Novel FPGA based Haar classifier face detection algorithm acceleration

We present here a novel approach to use FPGA to accelerate the Haar-classifier based face detection algorithm. With highly pipelined microarchitecture and utilizing abundant parallel arithmetic units in the FPGA, we've achieved real-time performance of face detection having very high detection...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Changjian Gao, Shih-Lien Lu
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Classification algorithms Fabrics Face Face detection Field programmable gate arrays Pixel Software
Online-Zugang:	Volltext bestellen
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