CMOS Integrated Single Electron Transistor Electrometry (CMOS-SET) Circuit Design for Nanosecond Quantum-Bit Read-out

Novel single electron transistor (SET) read-out circuit designs are described. The circuits use a silicon SET interfaced to a CMOS voltage mode or current mode comparator to obtain a digital read-out of the state of the qubit. The design assumes standard submicron (0.35 um) CMOS SOI technology using...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Gurrieri, T.M., Carroll, M.S., Lilly, M.P., Levy, J.E.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS integrated circuits Integrated circuit modeling Noise Power dissipation Semiconductor device modeling Signal to noise ratio SPICE
Online-Zugang:	Volltext bestellen
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