An efficient architecture of RNS based Wallace Tree multiplier for DSP applications

In this paper a novel technique to determine the optimal moduli set has been introduced and an efficient RNS multiplier based on Wallace tree multiplier (for 32 bit arithmetic unit) for DSP applications is presented. Performance analysis on a number of DSP functions like FIR, FFT etc. clearly indica...

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Bibliographische Detailangaben

Hauptverfasser:	Kundu, P.P., Bandyopadhyay, O., Sinha, A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Adders Arrays Complexity theory Delay Finite impulse response filter Logic gates Table lookup
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