Enabling self-reconfiguration on a video processing platform
FPGA implementations of complex image processing algorithms are often limited in flexibility and by the amount of available chip resources. This article presents a hardware design of an adaptive self-reconfigurable video processing platform. Dynamic self-reconfiguration increases a designpsilas flex...
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| creator | Ackermann, K.F. Hoffmann, B. Indrusiak, L.S. Glesner, M. |
| description | FPGA implementations of complex image processing algorithms are often limited in flexibility and by the amount of available chip resources. This article presents a hardware design of an adaptive self-reconfigurable video processing platform. Dynamic self-reconfiguration increases a designpsilas flexibility and enables the use of FPGAs with a fraction of resources actually needed by the algorithm. As a case study two implementation approaches of a complex frame-grabber with a set of dynamically reconfigurable kernels are evaluated and further improvements are outlined. |
| doi_str_mv | 10.1109/SIES.2008.4577676 |
| format | Conference Proceeding |
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| identifier | ISSN: 2150-3109 |
| ispartof | 2008 International Symposium on Industrial Embedded Systems, 2008, p.19-26 |
| issn | 2150-3109 2150-3117 |
| language | eng |
| recordid | cdi_ieee_primary_4577676 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Algorithm design and analysis Application software dynamic reconfiguration Field programmable gate arrays floorplanning FPGA frame-grabber Hardware ICAP Image processing Kernel Layout Microelectronics Runtime smart camera Smart cameras video processing Virtex-4 |
| title | Enabling self-reconfiguration on a video processing platform |
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