Cache-Aware Real-Time Scheduling on Multicore Platforms: Heuristics and a Case Study

Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are shared by some or all of the cores on the chip. To effectively use the available processing resources on such platforms,schedu...

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Hauptverfasser: Calandrino, J.M., Anderson, J.H.
Format: Tagungsbericht
Sprache:eng
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