Technology-Driven, Highly-Scalable Dragonfly Topology
Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks, however, require longer cables than their low-radix counterparts. Because cables dominate network cost, the number of ca...
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creator | Kim, John Dally, Wiliam J. Scott, Steve Abts, Dennis |
description | Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks, however, require longer cables than their low-radix counterparts. Because cables dominate network cost, the number of cables, and particularly the number of long, global cables should be minimized to realize an efficient network. In this paper, we introduce the dragonfly topology which uses a group of high-radix routers as a virtual router to increase the effective radix of the network. With this organization, each minimally routed packet traverses at most one global channel. By reducing global channels, a dragonfly reduces cost by 20% compared to a flattened butterfly and by 52% compared to a folded Clos network in configurations with ≥ 16K nodes.We also introduce two new variants of global adaptive routing that enable load-balanced routing in the dragonfly. Each router in a dragonfly must make an adaptive routing decision based on the state of a global channel connected to a different router. Because of the indirect nature of this routing decision, conventional adaptive routing algorithms give degraded performance. We introduce the use of selective virtual-channel discrimination and the use of credit round-trip latency to both sense and signal channel congestion. The combination of these two methods gives throughput and latency that approaches that of an ideal adaptive routing algorithm. |
doi_str_mv | 10.1109/ISCA.2008.19 |
format | Conference Proceeding |
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High-radix networks, however, require longer cables than their low-radix counterparts. Because cables dominate network cost, the number of cables, and particularly the number of long, global cables should be minimized to realize an efficient network. In this paper, we introduce the dragonfly topology which uses a group of high-radix routers as a virtual router to increase the effective radix of the network. With this organization, each minimally routed packet traverses at most one global channel. By reducing global channels, a dragonfly reduces cost by 20% compared to a flattened butterfly and by 52% compared to a folded Clos network in configurations with ≥ 16K nodes.We also introduce two new variants of global adaptive routing that enable load-balanced routing in the dragonfly. Each router in a dragonfly must make an adaptive routing decision based on the state of a global channel connected to a different router. Because of the indirect nature of this routing decision, conventional adaptive routing algorithms give degraded performance. We introduce the use of selective virtual-channel discrimination and the use of credit round-trip latency to both sense and signal channel congestion. The combination of these two methods gives throughput and latency that approaches that of an ideal adaptive routing algorithm.</description><identifier>ISSN: 1063-6897</identifier><identifier>ISBN: 9780769531748</identifier><identifier>ISBN: 0769531741</identifier><identifier>EISSN: 2575-713X</identifier><identifier>DOI: 10.1109/ISCA.2008.19</identifier><language>eng</language><publisher>Washington, DC, USA: IEEE Computer Society</publisher><subject>Bandwidth ; Cables ; Computer architecture ; Costs ; Delay ; dragonfly ; Hardware ; Hardware -- Hardware validation ; Hardware -- Integrated circuits -- Interconnect ; Hardware -- Integrated circuits -- Interconnect -- Input -- output circuits ; interconnection networks ; Multiprocessor interconnection networks ; Network topology ; Optical network units ; Optical sensors ; Routing ; topology</subject><ispartof>2008 International Symposium on Computer Architecture, 2008, p.77-88</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-a284t-4ef5aa72f5248ac0d46105779f3a7b034f5f982434cfcd1e5c0494bb33dc32723</citedby></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4556717$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4556717$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Kim, John</creatorcontrib><creatorcontrib>Dally, Wiliam J.</creatorcontrib><creatorcontrib>Scott, Steve</creatorcontrib><creatorcontrib>Abts, Dennis</creatorcontrib><title>Technology-Driven, Highly-Scalable Dragonfly Topology</title><title>2008 International Symposium on Computer Architecture</title><addtitle>ISCA</addtitle><description>Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks, however, require longer cables than their low-radix counterparts. Because cables dominate network cost, the number of cables, and particularly the number of long, global cables should be minimized to realize an efficient network. In this paper, we introduce the dragonfly topology which uses a group of high-radix routers as a virtual router to increase the effective radix of the network. With this organization, each minimally routed packet traverses at most one global channel. By reducing global channels, a dragonfly reduces cost by 20% compared to a flattened butterfly and by 52% compared to a folded Clos network in configurations with ≥ 16K nodes.We also introduce two new variants of global adaptive routing that enable load-balanced routing in the dragonfly. Each router in a dragonfly must make an adaptive routing decision based on the state of a global channel connected to a different router. Because of the indirect nature of this routing decision, conventional adaptive routing algorithms give degraded performance. We introduce the use of selective virtual-channel discrimination and the use of credit round-trip latency to both sense and signal channel congestion. The combination of these two methods gives throughput and latency that approaches that of an ideal adaptive routing algorithm.</description><subject>Bandwidth</subject><subject>Cables</subject><subject>Computer architecture</subject><subject>Costs</subject><subject>Delay</subject><subject>dragonfly</subject><subject>Hardware</subject><subject>Hardware -- Hardware validation</subject><subject>Hardware -- Integrated circuits -- Interconnect</subject><subject>Hardware -- Integrated circuits -- Interconnect -- Input -- output circuits</subject><subject>interconnection networks</subject><subject>Multiprocessor interconnection networks</subject><subject>Network topology</subject><subject>Optical network units</subject><subject>Optical sensors</subject><subject>Routing</subject><subject>topology</subject><issn>1063-6897</issn><issn>2575-713X</issn><isbn>9780769531748</isbn><isbn>0769531741</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNqNkDtPwzAYRS0eElHpxsaShQkcPr9ie6xaoJUqMbRIbJbj2GnATaoEIeXfk1J-ANMd7tHV1UHohkBGCOjH1WY-yyiAyog-QwkVUmBJ2Ps5mmqpQOZaMCK5ukAJgZzhXGl5haZ9_wEAROcjyxIktt7tmja21YAXXf3tm4d0WVe7OOCNs9EW0aeLzlZtE-KQbtvDL3qNLoONvZ_-5QS9PT9t50u8fn1ZzWdrbKniX5j7IKyVNAjKlXVQ8pyAkFIHZmUBjAcRtKKccRdcSbxwwDUvCsZKx6ikbIJuT7u1994cunpvu8FwIcb3cmzvT611e1O07WdvCJijHHOUY45yDNGm6GofRvruPzT7AbZQXys</recordid><startdate>20080601</startdate><enddate>20080601</enddate><creator>Kim, John</creator><creator>Dally, Wiliam J.</creator><creator>Scott, Steve</creator><creator>Abts, Dennis</creator><general>IEEE Computer Society</general><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>20080601</creationdate><title>Technology-Driven, Highly-Scalable Dragonfly Topology</title><author>Kim, John ; Dally, Wiliam J. ; Scott, Steve ; Abts, Dennis</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-a284t-4ef5aa72f5248ac0d46105779f3a7b034f5f982434cfcd1e5c0494bb33dc32723</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Bandwidth</topic><topic>Cables</topic><topic>Computer architecture</topic><topic>Costs</topic><topic>Delay</topic><topic>dragonfly</topic><topic>Hardware</topic><topic>Hardware -- Hardware validation</topic><topic>Hardware -- Integrated circuits -- Interconnect</topic><topic>Hardware -- Integrated circuits -- Interconnect -- Input -- output circuits</topic><topic>interconnection networks</topic><topic>Multiprocessor interconnection networks</topic><topic>Network topology</topic><topic>Optical network units</topic><topic>Optical sensors</topic><topic>Routing</topic><topic>topology</topic><toplevel>online_resources</toplevel><creatorcontrib>Kim, John</creatorcontrib><creatorcontrib>Dally, Wiliam J.</creatorcontrib><creatorcontrib>Scott, Steve</creatorcontrib><creatorcontrib>Abts, Dennis</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kim, John</au><au>Dally, Wiliam J.</au><au>Scott, Steve</au><au>Abts, Dennis</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Technology-Driven, Highly-Scalable Dragonfly Topology</atitle><btitle>2008 International Symposium on Computer Architecture</btitle><stitle>ISCA</stitle><date>2008-06-01</date><risdate>2008</risdate><spage>77</spage><epage>88</epage><pages>77-88</pages><issn>1063-6897</issn><eissn>2575-713X</eissn><isbn>9780769531748</isbn><isbn>0769531741</isbn><abstract>Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks, however, require longer cables than their low-radix counterparts. Because cables dominate network cost, the number of cables, and particularly the number of long, global cables should be minimized to realize an efficient network. In this paper, we introduce the dragonfly topology which uses a group of high-radix routers as a virtual router to increase the effective radix of the network. With this organization, each minimally routed packet traverses at most one global channel. By reducing global channels, a dragonfly reduces cost by 20% compared to a flattened butterfly and by 52% compared to a folded Clos network in configurations with ≥ 16K nodes.We also introduce two new variants of global adaptive routing that enable load-balanced routing in the dragonfly. Each router in a dragonfly must make an adaptive routing decision based on the state of a global channel connected to a different router. Because of the indirect nature of this routing decision, conventional adaptive routing algorithms give degraded performance. We introduce the use of selective virtual-channel discrimination and the use of credit round-trip latency to both sense and signal channel congestion. The combination of these two methods gives throughput and latency that approaches that of an ideal adaptive routing algorithm.</abstract><cop>Washington, DC, USA</cop><pub>IEEE Computer Society</pub><doi>10.1109/ISCA.2008.19</doi><tpages>12</tpages></addata></record> |
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identifier | ISSN: 1063-6897 |
ispartof | 2008 International Symposium on Computer Architecture, 2008, p.77-88 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Bandwidth Cables Computer architecture Costs Delay dragonfly Hardware Hardware -- Hardware validation Hardware -- Integrated circuits -- Interconnect Hardware -- Integrated circuits -- Interconnect -- Input -- output circuits interconnection networks Multiprocessor interconnection networks Network topology Optical network units Optical sensors Routing topology |
title | Technology-Driven, Highly-Scalable Dragonfly Topology |
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