RevLib: An Online Resource for Reversible Functions and Reversible Circuits
Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, results are often documented only in terms of gate counts or quantum costs, rather than presenting the specific circuit. In...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 225 |
---|---|
container_issue | |
container_start_page | 220 |
container_title | |
container_volume | |
creator | Wille, R. Grosse, D. Teuber, L. Dueck, G.W. Drechsler, R. |
description | Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, results are often documented only in terms of gate counts or quantum costs, rather than presenting the specific circuit. In this paper RevLib (www.revlib.org) is introduced, an online resource for reversible functions and reversible circuits. RevLib provides a large database of functions with respective circuit realizations. RevLib is designed to ease the evaluation of new methods and facilitate the comparison of results. In addition, tools are introduced to support researchers in evaluating their algorithms and documenting their results. |
doi_str_mv | 10.1109/ISMVL.2008.43 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4539430</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4539430</ieee_id><sourcerecordid>4539430</sourcerecordid><originalsourceid>FETCH-LOGICAL-i214t-6cb69a0ae2cacfde6c9f938d7343d2814635610cafa5817a07f8968e889d97843</originalsourceid><addsrcrecordid>eNpNj0tLw0AURgcfYK1dunIzfyDxznvGXQlWi5FCfeCuTCY3MBITySSF_nsLunD1cThw4CPkmkHOGLjb9cvze5lzAJtLcUJmXBibcc71KVk4Y8FopwRTypyRGTCnMs3FxwW5TOkTgAM3MCNPW9yXsbqjy45uujZ2SLeY-mkISJt-OMIehxSrFulq6sIY-y5R39X_RRGHMMUxXZHzxrcJF387J2-r-9fiMSs3D-tiWWaRMzlmOlTaefDIgw9NjTq4xglbGyFFzS2TWijNIPjGK8uMB9NYpy1a6-rjLSnm5Oa3GxFx9z3ELz8cdlIJJwWIH9zzTlw</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>RevLib: An Online Resource for Reversible Functions and Reversible Circuits</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Wille, R. ; Grosse, D. ; Teuber, L. ; Dueck, G.W. ; Drechsler, R.</creator><creatorcontrib>Wille, R. ; Grosse, D. ; Teuber, L. ; Dueck, G.W. ; Drechsler, R.</creatorcontrib><description>Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, results are often documented only in terms of gate counts or quantum costs, rather than presenting the specific circuit. In this paper RevLib (www.revlib.org) is introduced, an online resource for reversible functions and reversible circuits. RevLib provides a large database of functions with respective circuit realizations. RevLib is designed to ease the evaluation of new methods and facilitate the comparison of results. In addition, tools are introduced to support researchers in evaluating their algorithms and documenting their results.</description><identifier>ISSN: 0195-623X</identifier><identifier>ISBN: 9780769531557</identifier><identifier>ISBN: 0769531555</identifier><identifier>EISSN: 2378-2226</identifier><identifier>DOI: 10.1109/ISMVL.2008.43</identifier><language>eng</language><publisher>IEEE</publisher><subject>Benchmarks ; Circuit synthesis ; Computer science ; Costs ; Digital circuits ; Libraries ; Logic circuits ; Multivalued logic ; Niobium ; Quantum computing ; Reversible Logic ; Synthesis</subject><ispartof>38th International Symposium on Multiple Valued Logic (ismvl 2008), 2008, p.220-225</ispartof><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4539430$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4539430$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Wille, R.</creatorcontrib><creatorcontrib>Grosse, D.</creatorcontrib><creatorcontrib>Teuber, L.</creatorcontrib><creatorcontrib>Dueck, G.W.</creatorcontrib><creatorcontrib>Drechsler, R.</creatorcontrib><title>RevLib: An Online Resource for Reversible Functions and Reversible Circuits</title><title>38th International Symposium on Multiple Valued Logic (ismvl 2008)</title><addtitle>ISMVL</addtitle><description>Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, results are often documented only in terms of gate counts or quantum costs, rather than presenting the specific circuit. In this paper RevLib (www.revlib.org) is introduced, an online resource for reversible functions and reversible circuits. RevLib provides a large database of functions with respective circuit realizations. RevLib is designed to ease the evaluation of new methods and facilitate the comparison of results. In addition, tools are introduced to support researchers in evaluating their algorithms and documenting their results.</description><subject>Benchmarks</subject><subject>Circuit synthesis</subject><subject>Computer science</subject><subject>Costs</subject><subject>Digital circuits</subject><subject>Libraries</subject><subject>Logic circuits</subject><subject>Multivalued logic</subject><subject>Niobium</subject><subject>Quantum computing</subject><subject>Reversible Logic</subject><subject>Synthesis</subject><issn>0195-623X</issn><issn>2378-2226</issn><isbn>9780769531557</isbn><isbn>0769531555</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpNj0tLw0AURgcfYK1dunIzfyDxznvGXQlWi5FCfeCuTCY3MBITySSF_nsLunD1cThw4CPkmkHOGLjb9cvze5lzAJtLcUJmXBibcc71KVk4Y8FopwRTypyRGTCnMs3FxwW5TOkTgAM3MCNPW9yXsbqjy45uujZ2SLeY-mkISJt-OMIehxSrFulq6sIY-y5R39X_RRGHMMUxXZHzxrcJF387J2-r-9fiMSs3D-tiWWaRMzlmOlTaefDIgw9NjTq4xglbGyFFzS2TWijNIPjGK8uMB9NYpy1a6-rjLSnm5Oa3GxFx9z3ELz8cdlIJJwWIH9zzTlw</recordid><startdate>20080101</startdate><enddate>20080101</enddate><creator>Wille, R.</creator><creator>Grosse, D.</creator><creator>Teuber, L.</creator><creator>Dueck, G.W.</creator><creator>Drechsler, R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>20080101</creationdate><title>RevLib: An Online Resource for Reversible Functions and Reversible Circuits</title><author>Wille, R. ; Grosse, D. ; Teuber, L. ; Dueck, G.W. ; Drechsler, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i214t-6cb69a0ae2cacfde6c9f938d7343d2814635610cafa5817a07f8968e889d97843</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Benchmarks</topic><topic>Circuit synthesis</topic><topic>Computer science</topic><topic>Costs</topic><topic>Digital circuits</topic><topic>Libraries</topic><topic>Logic circuits</topic><topic>Multivalued logic</topic><topic>Niobium</topic><topic>Quantum computing</topic><topic>Reversible Logic</topic><topic>Synthesis</topic><toplevel>online_resources</toplevel><creatorcontrib>Wille, R.</creatorcontrib><creatorcontrib>Grosse, D.</creatorcontrib><creatorcontrib>Teuber, L.</creatorcontrib><creatorcontrib>Dueck, G.W.</creatorcontrib><creatorcontrib>Drechsler, R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Wille, R.</au><au>Grosse, D.</au><au>Teuber, L.</au><au>Dueck, G.W.</au><au>Drechsler, R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>RevLib: An Online Resource for Reversible Functions and Reversible Circuits</atitle><btitle>38th International Symposium on Multiple Valued Logic (ismvl 2008)</btitle><stitle>ISMVL</stitle><date>2008-01-01</date><risdate>2008</risdate><spage>220</spage><epage>225</epage><pages>220-225</pages><issn>0195-623X</issn><eissn>2378-2226</eissn><isbn>9780769531557</isbn><isbn>0769531555</isbn><abstract>Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, results are often documented only in terms of gate counts or quantum costs, rather than presenting the specific circuit. In this paper RevLib (www.revlib.org) is introduced, an online resource for reversible functions and reversible circuits. RevLib provides a large database of functions with respective circuit realizations. RevLib is designed to ease the evaluation of new methods and facilitate the comparison of results. In addition, tools are introduced to support researchers in evaluating their algorithms and documenting their results.</abstract><pub>IEEE</pub><doi>10.1109/ISMVL.2008.43</doi><tpages>6</tpages><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0195-623X |
ispartof | 38th International Symposium on Multiple Valued Logic (ismvl 2008), 2008, p.220-225 |
issn | 0195-623X 2378-2226 |
language | eng |
recordid | cdi_ieee_primary_4539430 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Benchmarks Circuit synthesis Computer science Costs Digital circuits Libraries Logic circuits Multivalued logic Niobium Quantum computing Reversible Logic Synthesis |
title | RevLib: An Online Resource for Reversible Functions and Reversible Circuits |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T11%3A30%3A14IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=RevLib:%20An%20Online%20Resource%20for%20Reversible%20Functions%20and%20Reversible%20Circuits&rft.btitle=38th%20International%20Symposium%20on%20Multiple%20Valued%20Logic%20(ismvl%202008)&rft.au=Wille,%20R.&rft.date=2008-01-01&rft.spage=220&rft.epage=225&rft.pages=220-225&rft.issn=0195-623X&rft.eissn=2378-2226&rft.isbn=9780769531557&rft.isbn_list=0769531555&rft_id=info:doi/10.1109/ISMVL.2008.43&rft_dat=%3Cieee_6IE%3E4539430%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4539430&rfr_iscdi=true |