Equalizer implementation for 10 Gbps serial data link in 90 nm CMOS technology

This paper presents a 10-Gbps SerDes equalizer using 90-nm standard CMOS technology. It is would be integrated into ASIC designs that require serial link transceivers. The equalizer used to overcome the effects of channel loss and intersymbol interference (ISI), these effects result from the reflect...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	El-Fattah, A.A.A., Mohamed, F.A.N., Arafa, A.M., Ahmed, M.M., El-Hay, D.R.A., El-Aziz, M.O.A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Adaptive Equalization Application specific integrated circuits Bandwidth CMOS technology Decision Feedback Equalizer Decision feedback equalizers Feed Forward Equalizer Feeds Intersymbol interference Reflection SerDes Termination of employment Transceivers Transmitters
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