Software-cooperative power-efficient heterogeneous multi-core for media processing
A heterogeneous multi-core processor (HMCP) architecture, which integrates general purpose processors (CPU) and accelerators (ACC) to achieve high-performance as well as low-power consumption with the support of a parallelizing compiler, was developed. The evaluation was performed using an MP3 audio...
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| creator | Shikano, Hiroaki Ito, Masaki Uchiyama, Kunio Odaka, Toshihiko Hayashi, Akihiro Masuura, Takeshi Mase, Masayoshi Shirako, Jun Wada, Yasutaka Kimura, Keiji Kasahara, Hironori |
| description | A heterogeneous multi-core processor (HMCP) architecture, which integrates general purpose processors (CPU) and accelerators (ACC) to achieve high-performance as well as low-power consumption with the support of a parallelizing compiler, was developed. The evaluation was performed using an MP3 audio encoder on a simulator that accurately models the HMCP. It showed that 16-frame encoding on the HMCP with four CPUs and four ACCs yielded 24.5-fold speed-up of performance against sequential execution on one CPU. Furthermore, power saving by the compiler reduced energy consumption of the encoding to 0.17 J, namely, by 28.4%. |
| doi_str_mv | 10.1109/ASPDAC.2008.4484049 |
| format | Conference Proceeding |
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Furthermore, power saving by the compiler reduced energy consumption of the encoding to 0.17 J, namely, by 28.4%.</description><subject>Computer architecture</subject><subject>Digital audio players</subject><subject>Encoding</subject><subject>Energy consumption</subject><subject>Memory architecture</subject><subject>Multicore processing</subject><subject>Nonhomogeneous media</subject><subject>Optimizing compilers</subject><subject>Scheduling</subject><subject>Software performance</subject><issn>2153-6961</issn><issn>2153-697X</issn><isbn>1424419212</isbn><isbn>9781424419210</isbn><isbn>1424419220</isbn><isbn>9781424419227</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpFkN9KwzAYxeOfgdvcE-ymL9D6JU2T5rJUp8JAcQrejTT9MiNrU9LO4dtbcOi5ORe_w4FzCFlSSCgFdVNsnm-LMmEAecJ5zoGrMzKjnHFOFWNwTqaMZmkslHy_-AeUXf4BQSdkNhZIBQq4vCKLvv-EUTxLhcyn5GXj7XDUAWPjfYdBD-4Lo84fMcRorTMO2yH6wAGD32GL_tBHzWE_uDEfMLI-RA3WTkdd8Ab73rW7azKxet_j4uRz8ra6ey0f4vXT_WNZrGNHMzHE1qAdRwiWM1lDZvJUMjFOrSSMXFRUWawsQA1MUMAKUio1asYzbkxmRDony99eh4jbLrhGh-_t6aj0B_Q1V00</recordid><startdate>200801</startdate><enddate>200801</enddate><creator>Shikano, Hiroaki</creator><creator>Ito, Masaki</creator><creator>Uchiyama, Kunio</creator><creator>Odaka, Toshihiko</creator><creator>Hayashi, Akihiro</creator><creator>Masuura, Takeshi</creator><creator>Mase, Masayoshi</creator><creator>Shirako, Jun</creator><creator>Wada, Yasutaka</creator><creator>Kimura, Keiji</creator><creator>Kasahara, Hironori</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200801</creationdate><title>Software-cooperative power-efficient heterogeneous multi-core for media processing</title><author>Shikano, Hiroaki ; Ito, Masaki ; Uchiyama, Kunio ; Odaka, Toshihiko ; Hayashi, Akihiro ; Masuura, Takeshi ; Mase, Masayoshi ; Shirako, Jun ; Wada, Yasutaka ; Kimura, Keiji ; Kasahara, Hironori</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i156t-fcef22062827d05c83726008b701566b19febf00d02610eb0317aea2454cc5c63</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng ; jpn</language><creationdate>2008</creationdate><topic>Computer architecture</topic><topic>Digital audio players</topic><topic>Encoding</topic><topic>Energy consumption</topic><topic>Memory architecture</topic><topic>Multicore processing</topic><topic>Nonhomogeneous media</topic><topic>Optimizing compilers</topic><topic>Scheduling</topic><topic>Software performance</topic><toplevel>online_resources</toplevel><creatorcontrib>Shikano, Hiroaki</creatorcontrib><creatorcontrib>Ito, Masaki</creatorcontrib><creatorcontrib>Uchiyama, Kunio</creatorcontrib><creatorcontrib>Odaka, Toshihiko</creatorcontrib><creatorcontrib>Hayashi, Akihiro</creatorcontrib><creatorcontrib>Masuura, Takeshi</creatorcontrib><creatorcontrib>Mase, Masayoshi</creatorcontrib><creatorcontrib>Shirako, Jun</creatorcontrib><creatorcontrib>Wada, Yasutaka</creatorcontrib><creatorcontrib>Kimura, Keiji</creatorcontrib><creatorcontrib>Kasahara, Hironori</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Shikano, Hiroaki</au><au>Ito, Masaki</au><au>Uchiyama, Kunio</au><au>Odaka, Toshihiko</au><au>Hayashi, Akihiro</au><au>Masuura, Takeshi</au><au>Mase, Masayoshi</au><au>Shirako, Jun</au><au>Wada, Yasutaka</au><au>Kimura, Keiji</au><au>Kasahara, Hironori</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Software-cooperative power-efficient heterogeneous multi-core for media processing</atitle><btitle>2008 Asia and South Pacific Design Automation Conference</btitle><stitle>ASPDAC</stitle><date>2008-01</date><risdate>2008</risdate><spage>736</spage><epage>741</epage><pages>736-741</pages><issn>2153-6961</issn><eissn>2153-697X</eissn><isbn>1424419212</isbn><isbn>9781424419210</isbn><eisbn>1424419220</eisbn><eisbn>9781424419227</eisbn><abstract>A heterogeneous multi-core processor (HMCP) architecture, which integrates general purpose processors (CPU) and accelerators (ACC) to achieve high-performance as well as low-power consumption with the support of a parallelizing compiler, was developed. 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| identifier | ISSN: 2153-6961 |
| ispartof | 2008 Asia and South Pacific Design Automation Conference, 2008, p.736-741 |
| issn | 2153-6961 2153-697X |
| language | eng ; jpn |
| recordid | cdi_ieee_primary_4484049 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Computer architecture Digital audio players Encoding Energy consumption Memory architecture Multicore processing Nonhomogeneous media Optimizing compilers Scheduling Software performance |
| title | Software-cooperative power-efficient heterogeneous multi-core for media processing |
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