iWarp: an integrated solution to high-speed parallel computing

A description is given of the iWarp architecture and how it supports various communication models and system configurations. The heart of an iWarp system is the iWarp component: a single-chip processor that requires only the addition of memory chips to form a complete system building block, called t...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Borkar, S., Cohn, R., Cox, G., Gleason, S., Gross, T., Kung, H.T., Lam, M., Moore, B., Peterson, C., Pieper, J., Rankin, L., Tseng, P.S., Sutton, J., Urbanski, J., Webb, J.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Computational modeling Computer architecture Computer interfaces Concurrent computing Distributed computing Engines Heart Parallel processing Power system modeling Systolic arrays
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