A 0.2V, 7.5 μW, 20 kHz ΣΔ modulator with 69 dB SNR in 90 nm CMOS

This paper presents a frequency-to-digital SigmaDelta modulator designed in a digital 90nm CMOS process, operating with a supply voltage of 0.2 V. For a 7.5 muW power consumption, the SNR is 68.9 dB and the SNDR is 60.3 dB over a 20Hz-20kHz bandwidth. This work shows that the SNR/SNDR performance of...

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Bibliographische Detailangaben

Hauptverfasser:	Wismar, U., Wisland, D., Andreani, P.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Chirp modulation CMOS process Digital modulation Energy consumption Feedback Frequency modulation Quantization Threshold voltage Topology Voltage-controlled oscillators
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