A 90μW 15-bit ΔΣ ADC for digital audio
Architecture, circuit design details and measurement results for a 15 bit audio continuous-time ΔΣ modulator (CTDSM) are given. The converter, designed in a 0.18 μm CMOS technology, achieves a dynamic range of 93.5 dB in a 24 kHz bandwidth and dissipates 90 μW from a 1.8V supply. It features a third...
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creator | Shanthi Pavan Nagendra Krishnapura Ramalingam Pandarinathan Prabu Sankar |
description | Architecture, circuit design details and measurement results for a 15 bit audio continuous-time ΔΣ modulator (CTDSM) are given. The converter, designed in a 0.18 μm CMOS technology, achieves a dynamic range of 93.5 dB in a 24 kHz bandwidth and dissipates 90 μW from a 1.8V supply. It features a third order active-RC loop filter, a very low power 4-bit flash quantizer and an efficient excess delay compensation scheme to reduce power dissipation. |
doi_str_mv | 10.1109/ESSCIRC.2007.4430279 |
format | Conference Proceeding |
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It features a third order active-RC loop filter, a very low power 4-bit flash quantizer and an efficient excess delay compensation scheme to reduce power dissipation.</description><subject>Bandwidth</subject><subject>CMOS technology</subject><subject>Filters</subject><subject>Jitter</subject><subject>Multi-stage noise shaping</subject><subject>Noise reduction</subject><subject>Operational amplifiers</subject><subject>Quantization</subject><subject>Resistors</subject><subject>Transfer functions</subject><issn>1930-8833</issn><isbn>9781424411252</isbn><isbn>1424411254</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj81Kw0AURgdUsNQ8gS5m62LivfOTyV2GsdZCQbAFl2UmmZGRSiWJC9_DN_A1fIY8k4r9NmdzOPAxdoVQIgLdLDYbt3p0pQSwpdYKpKUTVpCtUUutEaWRp2yGpEDUtVLnrBiGF_idNn_CjF03nGD6fuJoRMgjnz6nL97cOp4OPe_ycx79nvv3Lh8u2Fny-yEWR87Z9m6xdfdi_bBcuWYtMsEougAxQZukjSF0bYpK-worqrQPqvNJ-jbIBLKOpJMxaJFMRAjSWvItgZqzy_9sjjHu3vr86vuP3fGb-gGhREKM</recordid><startdate>200709</startdate><enddate>200709</enddate><creator>Shanthi Pavan</creator><creator>Nagendra Krishnapura</creator><creator>Ramalingam Pandarinathan</creator><creator>Prabu Sankar</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200709</creationdate><title>A 90μW 15-bit ΔΣ ADC for digital audio</title><author>Shanthi Pavan ; Nagendra Krishnapura ; Ramalingam Pandarinathan ; Prabu Sankar</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-db0ef0cf27ebbdcfe34a616964ab3daf2acb2f028e94f5517195e10b2779ac903</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Bandwidth</topic><topic>CMOS technology</topic><topic>Filters</topic><topic>Jitter</topic><topic>Multi-stage noise shaping</topic><topic>Noise reduction</topic><topic>Operational amplifiers</topic><topic>Quantization</topic><topic>Resistors</topic><topic>Transfer functions</topic><toplevel>online_resources</toplevel><creatorcontrib>Shanthi Pavan</creatorcontrib><creatorcontrib>Nagendra Krishnapura</creatorcontrib><creatorcontrib>Ramalingam Pandarinathan</creatorcontrib><creatorcontrib>Prabu Sankar</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Shanthi Pavan</au><au>Nagendra Krishnapura</au><au>Ramalingam Pandarinathan</au><au>Prabu Sankar</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 90μW 15-bit ΔΣ ADC for digital audio</atitle><btitle>ESSCIRC 2007 - 33rd European Solid-State Circuits Conference</btitle><stitle>ESSCIRC</stitle><date>2007-09</date><risdate>2007</risdate><spage>198</spage><epage>201</epage><pages>198-201</pages><issn>1930-8833</issn><isbn>9781424411252</isbn><isbn>1424411254</isbn><abstract>Architecture, circuit design details and measurement results for a 15 bit audio continuous-time ΔΣ modulator (CTDSM) are given. The converter, designed in a 0.18 μm CMOS technology, achieves a dynamic range of 93.5 dB in a 24 kHz bandwidth and dissipates 90 μW from a 1.8V supply. It features a third order active-RC loop filter, a very low power 4-bit flash quantizer and an efficient excess delay compensation scheme to reduce power dissipation.</abstract><pub>IEEE</pub><doi>10.1109/ESSCIRC.2007.4430279</doi><tpages>4</tpages></addata></record> |
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issn | 1930-8833 |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Bandwidth CMOS technology Filters Jitter Multi-stage noise shaping Noise reduction Operational amplifiers Quantization Resistors Transfer functions |
title | A 90μW 15-bit ΔΣ ADC for digital audio |
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