Low-power implementations of DSP through operand isolation and clock gating

The advent of implantable devices such as digital cochlea has made low power circuit design an increasingly important research area. In this paper, we utilize the operand isolation to save power dissipation in data-path by reducing unnecessary switching activity and clock gating to reduce redundant...

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Hauptverfasser:	Jun Chao, Yixin Zhao, Zhijun Wang, Songping Mai, Chun Zhang
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Chaos Circuits Clocks Digital signal processing Energy consumption Microelectronics Multiplexing Power dissipation Power system reliability Registers
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creator	Jun Chao Yixin Zhao Zhijun Wang Songping Mai Chun Zhang
description	The advent of implantable devices such as digital cochlea has made low power circuit design an increasingly important research area. In this paper, we utilize the operand isolation to save power dissipation in data-path by reducing unnecessary switching activity and clock gating to reduce redundant power dissipation in registers of our DSP which is used for implantable digital cochlea. Experimental result from running application program on our design shows 27.64% reduction in dynamic switching power with no increase in critical path delay and only 2.10% area overhead.
doi_str_mv	10.1109/ICASIC.2007.4415609
format	Conference Proceeding
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subjects	Chaos Circuits Clocks Digital signal processing Energy consumption Microelectronics Multiplexing Power dissipation Power system reliability Registers
title	Low-power implementations of DSP through operand isolation and clock gating
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