Co-synthesis of custom on-chip bus and memory for MPSoC architectures

The advancement in process technology has made it possible to integrate multiple processing modules on a single chip. As a result of this, there is a sharp increase of communication traffic on the communication bus architecture. In this case, the traditional single bus based architecture may fail to...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Pandey, Sujan, Genz, Christian, Drechsler, Rolf
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Capacitance Crosstalk Degradation Delay Energy consumption Memory architecture Multiprocessing systems Partitioning algorithms Signal synthesis Wires
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