Conductive Bridging Memory Development from Single Cells to 2Mbit Memory Arrays
Devices based on bipolar resistive switching in solid electrolytes are among the promising emerging memory technologies. Information storage is based on stable formation and removal of conductive links during electrical operation. In this paper, development results achieved during a joint project of...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 75 |
|---|---|
| container_issue | |
| container_start_page | 71 |
| container_title | |
| container_volume | |
| creator | Symanczyk, R. Dittrich, R. Keller, J. Kund, M. Muller, G. Ruf, B. Albarede, P.-H. Bournat, S. Bouteille, L. Duch, A. |
| description | Devices based on bipolar resistive switching in solid electrolytes are among the promising emerging memory technologies. Information storage is based on stable formation and removal of conductive links during electrical operation. In this paper, development results achieved during a joint project of Qimonda AG and ALTIS Semiconductor including the characterization of single cells and electrical data from recently processed 2Mbit memory array devices based on 90 nm CMOS technology node are presented. The unique combination of low-power, non-volatile, and fast operation for CBRAM will be shown. Measured data will demonstrate the excellent multi-level capability promoting the competitiveness with existing technologies in terms of bit density. Furthermore, technology challenges and memory application relevant features like endurance, retention, and operating temperature will be discussed. |
| doi_str_mv | 10.1109/NVMT.2007.4389950 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4389950</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4389950</ieee_id><sourcerecordid>4389950</sourcerecordid><originalsourceid>FETCH-LOGICAL-c138t-c504cd2007db996e59da550084a9b4c0853d287c84f5523d9d71ffe63246c5863</originalsourceid><addsrcrecordid>eNo1UMlOwzAUNEJIQMkHIC7-gYbnNfaxhFVq6IHCtUrsl8ooS-WESvl7imhPo1k0Gg0htwxSxsDev38V65QDZKkUxloFZySxmWGSS8mE5uycXJ8IE5ckGYZvAGCZPijiiqzyvvM_bgx7pA8x-G3otrTAto8TfcQ9Nv2uxW6kdexb-nEwG6Q5Ns1Ax57yogrjKb2IsZyGG3JRl82AyRFn5PP5aZ2_zperl7d8sZw7Jsw4dwqk83-7fWWtRmV9qRSAkaWtpAOjhOcmc0bWSnHhrc9YXaMWXGqnjBYzcvffGxBxs4uhLeO0OX4gfgGrvU7E</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Conductive Bridging Memory Development from Single Cells to 2Mbit Memory Arrays</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Symanczyk, R. ; Dittrich, R. ; Keller, J. ; Kund, M. ; Muller, G. ; Ruf, B. ; Albarede, P.-H. ; Bournat, S. ; Bouteille, L. ; Duch, A.</creator><creatorcontrib>Symanczyk, R. ; Dittrich, R. ; Keller, J. ; Kund, M. ; Muller, G. ; Ruf, B. ; Albarede, P.-H. ; Bournat, S. ; Bouteille, L. ; Duch, A.</creatorcontrib><description>Devices based on bipolar resistive switching in solid electrolytes are among the promising emerging memory technologies. Information storage is based on stable formation and removal of conductive links during electrical operation. In this paper, development results achieved during a joint project of Qimonda AG and ALTIS Semiconductor including the characterization of single cells and electrical data from recently processed 2Mbit memory array devices based on 90 nm CMOS technology node are presented. The unique combination of low-power, non-volatile, and fast operation for CBRAM will be shown. Measured data will demonstrate the excellent multi-level capability promoting the competitiveness with existing technologies in terms of bit density. Furthermore, technology challenges and memory application relevant features like endurance, retention, and operating temperature will be discussed.</description><identifier>ISBN: 1424413613</identifier><identifier>ISBN: 9781424413614</identifier><identifier>EISBN: 9781424413621</identifier><identifier>EISBN: 1424413621</identifier><identifier>DOI: 10.1109/NVMT.2007.4389950</identifier><language>eng</language><subject>Bridge circuits ; CMOS technology ; Contacts ; Electrodes ; Phase change random access memory ; Read-write memory ; Resistors ; Solids ; Tungsten ; Voltage</subject><ispartof>2007 Non-Volatile Memory Technology Symposium, 2007, p.71-75</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c138t-c504cd2007db996e59da550084a9b4c0853d287c84f5523d9d71ffe63246c5863</citedby></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4389950$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4389950$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Symanczyk, R.</creatorcontrib><creatorcontrib>Dittrich, R.</creatorcontrib><creatorcontrib>Keller, J.</creatorcontrib><creatorcontrib>Kund, M.</creatorcontrib><creatorcontrib>Muller, G.</creatorcontrib><creatorcontrib>Ruf, B.</creatorcontrib><creatorcontrib>Albarede, P.-H.</creatorcontrib><creatorcontrib>Bournat, S.</creatorcontrib><creatorcontrib>Bouteille, L.</creatorcontrib><creatorcontrib>Duch, A.</creatorcontrib><title>Conductive Bridging Memory Development from Single Cells to 2Mbit Memory Arrays</title><title>2007 Non-Volatile Memory Technology Symposium</title><addtitle>NVMT</addtitle><description>Devices based on bipolar resistive switching in solid electrolytes are among the promising emerging memory technologies. Information storage is based on stable formation and removal of conductive links during electrical operation. In this paper, development results achieved during a joint project of Qimonda AG and ALTIS Semiconductor including the characterization of single cells and electrical data from recently processed 2Mbit memory array devices based on 90 nm CMOS technology node are presented. The unique combination of low-power, non-volatile, and fast operation for CBRAM will be shown. Measured data will demonstrate the excellent multi-level capability promoting the competitiveness with existing technologies in terms of bit density. Furthermore, technology challenges and memory application relevant features like endurance, retention, and operating temperature will be discussed.</description><subject>Bridge circuits</subject><subject>CMOS technology</subject><subject>Contacts</subject><subject>Electrodes</subject><subject>Phase change random access memory</subject><subject>Read-write memory</subject><subject>Resistors</subject><subject>Solids</subject><subject>Tungsten</subject><subject>Voltage</subject><isbn>1424413613</isbn><isbn>9781424413614</isbn><isbn>9781424413621</isbn><isbn>1424413621</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1UMlOwzAUNEJIQMkHIC7-gYbnNfaxhFVq6IHCtUrsl8ooS-WESvl7imhPo1k0Gg0htwxSxsDev38V65QDZKkUxloFZySxmWGSS8mE5uycXJ8IE5ckGYZvAGCZPijiiqzyvvM_bgx7pA8x-G3otrTAto8TfcQ9Nv2uxW6kdexb-nEwG6Q5Ns1Ax57yogrjKb2IsZyGG3JRl82AyRFn5PP5aZ2_zperl7d8sZw7Jsw4dwqk83-7fWWtRmV9qRSAkaWtpAOjhOcmc0bWSnHhrc9YXaMWXGqnjBYzcvffGxBxs4uhLeO0OX4gfgGrvU7E</recordid><startdate>200711</startdate><enddate>200711</enddate><creator>Symanczyk, R.</creator><creator>Dittrich, R.</creator><creator>Keller, J.</creator><creator>Kund, M.</creator><creator>Muller, G.</creator><creator>Ruf, B.</creator><creator>Albarede, P.-H.</creator><creator>Bournat, S.</creator><creator>Bouteille, L.</creator><creator>Duch, A.</creator><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200711</creationdate><title>Conductive Bridging Memory Development from Single Cells to 2Mbit Memory Arrays</title><author>Symanczyk, R. ; Dittrich, R. ; Keller, J. ; Kund, M. ; Muller, G. ; Ruf, B. ; Albarede, P.-H. ; Bournat, S. ; Bouteille, L. ; Duch, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c138t-c504cd2007db996e59da550084a9b4c0853d287c84f5523d9d71ffe63246c5863</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Bridge circuits</topic><topic>CMOS technology</topic><topic>Contacts</topic><topic>Electrodes</topic><topic>Phase change random access memory</topic><topic>Read-write memory</topic><topic>Resistors</topic><topic>Solids</topic><topic>Tungsten</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Symanczyk, R.</creatorcontrib><creatorcontrib>Dittrich, R.</creatorcontrib><creatorcontrib>Keller, J.</creatorcontrib><creatorcontrib>Kund, M.</creatorcontrib><creatorcontrib>Muller, G.</creatorcontrib><creatorcontrib>Ruf, B.</creatorcontrib><creatorcontrib>Albarede, P.-H.</creatorcontrib><creatorcontrib>Bournat, S.</creatorcontrib><creatorcontrib>Bouteille, L.</creatorcontrib><creatorcontrib>Duch, A.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Symanczyk, R.</au><au>Dittrich, R.</au><au>Keller, J.</au><au>Kund, M.</au><au>Muller, G.</au><au>Ruf, B.</au><au>Albarede, P.-H.</au><au>Bournat, S.</au><au>Bouteille, L.</au><au>Duch, A.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Conductive Bridging Memory Development from Single Cells to 2Mbit Memory Arrays</atitle><btitle>2007 Non-Volatile Memory Technology Symposium</btitle><stitle>NVMT</stitle><date>2007-11</date><risdate>2007</risdate><spage>71</spage><epage>75</epage><pages>71-75</pages><isbn>1424413613</isbn><isbn>9781424413614</isbn><eisbn>9781424413621</eisbn><eisbn>1424413621</eisbn><abstract>Devices based on bipolar resistive switching in solid electrolytes are among the promising emerging memory technologies. Information storage is based on stable formation and removal of conductive links during electrical operation. In this paper, development results achieved during a joint project of Qimonda AG and ALTIS Semiconductor including the characterization of single cells and electrical data from recently processed 2Mbit memory array devices based on 90 nm CMOS technology node are presented. The unique combination of low-power, non-volatile, and fast operation for CBRAM will be shown. Measured data will demonstrate the excellent multi-level capability promoting the competitiveness with existing technologies in terms of bit density. Furthermore, technology challenges and memory application relevant features like endurance, retention, and operating temperature will be discussed.</abstract><doi>10.1109/NVMT.2007.4389950</doi><tpages>5</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISBN: 1424413613 |
| ispartof | 2007 Non-Volatile Memory Technology Symposium, 2007, p.71-75 |
| issn | |
| language | eng |
| recordid | cdi_ieee_primary_4389950 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Bridge circuits CMOS technology Contacts Electrodes Phase change random access memory Read-write memory Resistors Solids Tungsten Voltage |
| title | Conductive Bridging Memory Development from Single Cells to 2Mbit Memory Arrays |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T11%3A35%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Conductive%20Bridging%20Memory%20Development%20from%20Single%20Cells%20to%202Mbit%20Memory%20Arrays&rft.btitle=2007%20Non-Volatile%20Memory%20Technology%20Symposium&rft.au=Symanczyk,%20R.&rft.date=2007-11&rft.spage=71&rft.epage=75&rft.pages=71-75&rft.isbn=1424413613&rft.isbn_list=9781424413614&rft_id=info:doi/10.1109/NVMT.2007.4389950&rft_dat=%3Cieee_6IE%3E4389950%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=9781424413621&rft.eisbn_list=1424413621&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4389950&rfr_iscdi=true |