Discrete-Time Cellular Neural Networks in FPGA
This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions of neurons accommodated in low price FPGA devices, being able to process standard video in real time.
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| creator | Martinez-Alvarez, J.J. Toledo-Moreo, F.J. Ferrandez-Vicente, J.M. |
| description | This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions of neurons accommodated in low price FPGA devices, being able to process standard video in real time. |
| doi_str_mv | 10.1109/FCCM.2007.25 |
| format | Conference Proceeding |
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| ispartof | 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007), 2007, p.293-294 |
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| language | eng |
| recordid | cdi_ieee_primary_4297271 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Cellular neural networks Computer architecture Computer networks Convolution Field programmable gate arrays Hospitals Image edge detection Neural network hardware Neurons Pins |
| title | Discrete-Time Cellular Neural Networks in FPGA |
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