A 1.8-GHz 2-Watt Fully Integrated CMOS Push-Pull Parallel-Combined Power Amplifier Design
This paper newly presents a push-pull parallel-combined CMOS power amplifier (PA) and its analysis of operation. The proposed class-E CMOS PA incorporates the push-pull parallel-combined power devices with the 1:1:2 (two single-turn primary windings and a two-turn secondary winding) step-up on-chip...
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| creator | Lee, O. Ki Seok Yang Kyu Hwan An Younsuk Kim Hyungwook Kim Jae Joon Chang Wangmyong Woo Chang-Ho Lee Laskar, J. |
| description | This paper newly presents a push-pull parallel-combined CMOS power amplifier (PA) and its analysis of operation. The proposed class-E CMOS PA incorporates the push-pull parallel-combined power devices with the 1:1:2 (two single-turn primary windings and a two-turn secondary winding) step-up on-chip transformer. The PA is fully integrated in a standard 0.18- μ m CMOS technology without any external balun or matching networks. The operation of the PA with a multi-turn on-chip transformer is substantially analyzed in order to optimize the device size and its structure. Experimental data demonstrates the output power of 2-watt and the power-added efficiency (PAE) of more than 30% with a 3.3-V of power supply at 1.8 GHz. This is the new demonstration of the compact fully integrated CMOS PA with 2-watt of output power with very stable operation at 1.8GHz range. |
| doi_str_mv | 10.1109/RFIC.2007.380918 |
| format | Conference Proceeding |
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The proposed class-E CMOS PA incorporates the push-pull parallel-combined power devices with the 1:1:2 (two single-turn primary windings and a two-turn secondary winding) step-up on-chip transformer. The PA is fully integrated in a standard 0.18- μ m CMOS technology without any external balun or matching networks. The operation of the PA with a multi-turn on-chip transformer is substantially analyzed in order to optimize the device size and its structure. Experimental data demonstrates the output power of 2-watt and the power-added efficiency (PAE) of more than 30% with a 3.3-V of power supply at 1.8 GHz. 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The proposed class-E CMOS PA incorporates the push-pull parallel-combined power devices with the 1:1:2 (two single-turn primary windings and a two-turn secondary winding) step-up on-chip transformer. The PA is fully integrated in a standard 0.18- μ m CMOS technology without any external balun or matching networks. The operation of the PA with a multi-turn on-chip transformer is substantially analyzed in order to optimize the device size and its structure. Experimental data demonstrates the output power of 2-watt and the power-added efficiency (PAE) of more than 30% with a 3.3-V of power supply at 1.8 GHz. This is the new demonstration of the compact fully integrated CMOS PA with 2-watt of output power with very stable operation at 1.8GHz range.</description><subject>class-E</subject><subject>CMOS PA</subject><subject>CMOS technology</subject><subject>Communication switching</subject><subject>Equivalent circuits</subject><subject>High power amplifiers</subject><subject>Impedance</subject><subject>impedance transformation</subject><subject>parallel-combining</subject><subject>power amplifier</subject><subject>Power amplifiers</subject><subject>Power generation</subject><subject>Radiofrequency integrated circuits</subject><subject>Switching circuits</subject><subject>transformer</subject><subject>Wireless communication</subject><issn>1529-2517</issn><issn>2375-0995</issn><isbn>9781424405305</isbn><isbn>1424405300</isbn><isbn>9781424405312</isbn><isbn>1424405319</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpVjEtLAzEURuMLrLV7wU3-QMbcJDePZRntAyodfCCuSmaa1kj6YGaK1F_vgG5cfR-cwyHkBngGwN3d02iaZ4Jzk0nLHdgTMnDGghJKcZQgTklPSIOMO4dn_xjHc9IDFI4JBHNJrprmk3ch0K5H3ocUMsvGk28q2JtvWzo6pHSk020b1rVvw5Lmj_NnWhyaD1Z0iBa-9imFxPLdpozbTih2X6Gmw80-xVXs3n1o4np7TS5WPjVh8Ld98jp6eMknbDYfT_PhjEUw2DLwaKwHW0pjneCVcpJrdC6UqMBVslJBOaywMuUSnZDC2wpL4aXGZeAaZJ_c_nZjCGGxr-PG18eFElorreUPpg5TdA</recordid><startdate>200706</startdate><enddate>200706</enddate><creator>Lee, O.</creator><creator>Ki Seok Yang</creator><creator>Kyu Hwan An</creator><creator>Younsuk Kim</creator><creator>Hyungwook Kim</creator><creator>Jae Joon Chang</creator><creator>Wangmyong Woo</creator><creator>Chang-Ho Lee</creator><creator>Laskar, J.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200706</creationdate><title>A 1.8-GHz 2-Watt Fully Integrated CMOS Push-Pull Parallel-Combined Power Amplifier Design</title><author>Lee, O. ; Ki Seok Yang ; Kyu Hwan An ; Younsuk Kim ; Hyungwook Kim ; Jae Joon Chang ; Wangmyong Woo ; Chang-Ho Lee ; Laskar, J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-1a578a18b378920c49306599eb5419c3c4e495c5c7bd59232a8c5b2a365de0613</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>class-E</topic><topic>CMOS PA</topic><topic>CMOS technology</topic><topic>Communication switching</topic><topic>Equivalent circuits</topic><topic>High power amplifiers</topic><topic>Impedance</topic><topic>impedance transformation</topic><topic>parallel-combining</topic><topic>power amplifier</topic><topic>Power amplifiers</topic><topic>Power generation</topic><topic>Radiofrequency integrated circuits</topic><topic>Switching circuits</topic><topic>transformer</topic><topic>Wireless communication</topic><toplevel>online_resources</toplevel><creatorcontrib>Lee, O.</creatorcontrib><creatorcontrib>Ki Seok Yang</creatorcontrib><creatorcontrib>Kyu Hwan An</creatorcontrib><creatorcontrib>Younsuk Kim</creatorcontrib><creatorcontrib>Hyungwook Kim</creatorcontrib><creatorcontrib>Jae Joon Chang</creatorcontrib><creatorcontrib>Wangmyong Woo</creatorcontrib><creatorcontrib>Chang-Ho Lee</creatorcontrib><creatorcontrib>Laskar, J.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lee, O.</au><au>Ki Seok Yang</au><au>Kyu Hwan An</au><au>Younsuk Kim</au><au>Hyungwook Kim</au><au>Jae Joon Chang</au><au>Wangmyong Woo</au><au>Chang-Ho Lee</au><au>Laskar, J.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 1.8-GHz 2-Watt Fully Integrated CMOS Push-Pull Parallel-Combined Power Amplifier Design</atitle><btitle>2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium</btitle><stitle>RFIC</stitle><date>2007-06</date><risdate>2007</risdate><spage>435</spage><epage>438</epage><pages>435-438</pages><issn>1529-2517</issn><eissn>2375-0995</eissn><isbn>9781424405305</isbn><isbn>1424405300</isbn><eisbn>9781424405312</eisbn><eisbn>1424405319</eisbn><abstract>This paper newly presents a push-pull parallel-combined CMOS power amplifier (PA) and its analysis of operation. The proposed class-E CMOS PA incorporates the push-pull parallel-combined power devices with the 1:1:2 (two single-turn primary windings and a two-turn secondary winding) step-up on-chip transformer. The PA is fully integrated in a standard 0.18- μ m CMOS technology without any external balun or matching networks. The operation of the PA with a multi-turn on-chip transformer is substantially analyzed in order to optimize the device size and its structure. Experimental data demonstrates the output power of 2-watt and the power-added efficiency (PAE) of more than 30% with a 3.3-V of power supply at 1.8 GHz. This is the new demonstration of the compact fully integrated CMOS PA with 2-watt of output power with very stable operation at 1.8GHz range.</abstract><pub>IEEE</pub><doi>10.1109/RFIC.2007.380918</doi><tpages>4</tpages></addata></record> |
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| identifier | ISSN: 1529-2517 |
| ispartof | 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2007, p.435-438 |
| issn | 1529-2517 2375-0995 |
| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | class-E CMOS PA CMOS technology Communication switching Equivalent circuits High power amplifiers Impedance impedance transformation parallel-combining power amplifier Power amplifiers Power generation Radiofrequency integrated circuits Switching circuits transformer Wireless communication |
| title | A 1.8-GHz 2-Watt Fully Integrated CMOS Push-Pull Parallel-Combined Power Amplifier Design |
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