Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors

Three-dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. Prior work has looked at the performance, power, and area benefits of the 3D integration technology. In this paper, we investigate the scalability issues of 3D di...

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Hauptverfasser:	Puttaswamy, K., Loh, G.H.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuits Clocks Delay Design Die-stacked 3D integration Digital arithmetic Energy consumption Issue-width Microprocessors Parallel processing Power engineering computing Scalability Temperature sensors
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creator	Puttaswamy, K. Loh, G.H.
description	Three-dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. Prior work has looked at the performance, power, and area benefits of the 3D integration technology. In this paper, we investigate the scalability issues of 3D die-stacked arithmetic units. We explore the behavior of the 3D-integrated arithmetic circuits with increasing issue- width (parallel execution capability), transistor sizing, and temperature. We show that the 3D-integrated units have a lower latency degradation and lower rate of increase in energy consumption than the planar circuits with increasing issue-widths and operating temperatures. We demonstrate that the 3D-integrated circuits have less sensitivity to transistor sizing than the planar circuits.
doi_str_mv	10.1109/DAC.2007.375238
format	Conference Proceeding
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We demonstrate that the 3D-integrated circuits have less sensitivity to transistor sizing than the planar circuits.</description><subject>Circuits</subject><subject>Clocks</subject><subject>Delay</subject><subject>Design</subject><subject>Die-stacked 3D integration</subject><subject>Digital arithmetic</subject><subject>Energy consumption</subject><subject>Issue-width</subject><subject>Microprocessors</subject><subject>Parallel processing</subject><subject>Power engineering computing</subject><subject>Scalability</subject><subject>Temperature sensors</subject><issn>0738-100X</issn><isbn>1595936270</isbn><isbn>9781595936271</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotzMtOAjEUgOEmaiKgaxdu-gKDp7dpZ0lAhQSjRknckV5OoQZmSNsNb6-Jrv7Nl5-QOwZTxqB7WMzmUw6gp0IrLswFGTPVqU60XMMlGYEWpmEAX9dkXMo3AEjWshF5__D2YF06pHqmQ6Ri0az6irtsKwY6y6nuj1iTp5s-1UJTT5dpt2_eMMchH23vkb4kn4dTHjyWMuRyQ66iPRS8_e-EbJ4eP-fLZv36vJrP1k3ihtdGO--NAe9tQBfAdVF1IXZGSO9ZUNZLE6XQMkqHv5A75duIlgUjhIMQxYTc_30TIm5POR1tPm8lbxlXWvwA52JQSQ</recordid><startdate>200706</startdate><enddate>200706</enddate><creator>Puttaswamy, K.</creator><creator>Loh, G.H.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200706</creationdate><title>Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors</title><author>Puttaswamy, K. ; Loh, G.H.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i282t-7bcc880ccadebd0b9f59df9834cc1d5ac48f4374f4bec882b5c6fea1d833b0df3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Circuits</topic><topic>Clocks</topic><topic>Delay</topic><topic>Design</topic><topic>Die-stacked 3D integration</topic><topic>Digital arithmetic</topic><topic>Energy consumption</topic><topic>Issue-width</topic><topic>Microprocessors</topic><topic>Parallel processing</topic><topic>Power engineering computing</topic><topic>Scalability</topic><topic>Temperature sensors</topic><toplevel>online_resources</toplevel><creatorcontrib>Puttaswamy, K.</creatorcontrib><creatorcontrib>Loh, G.H.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Puttaswamy, K.</au><au>Loh, G.H.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors</atitle><btitle>2007 44th ACM/IEEE Design Automation Conference</btitle><stitle>DAC</stitle><date>2007-06</date><risdate>2007</risdate><spage>622</spage><epage>625</epage><pages>622-625</pages><issn>0738-100X</issn><isbn>1595936270</isbn><isbn>9781595936271</isbn><abstract>Three-dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. 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source	IEEE Electronic Library (IEL) Conference Proceedings
subjects	Circuits Clocks Delay Design Die-stacked 3D integration Digital arithmetic Energy consumption Issue-width Microprocessors Parallel processing Power engineering computing Scalability Temperature sensors
title	Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors
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