Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs
This paper presents a method for the on-chip measurement and correction of gain errors, offsets and non-linearities of a Track-and-Hold circuit (T&H) of an ADC. Open-loop T&H circuits will be considered in this paper because of their high-speed and low-power capabilities. However, these open...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 1954 |
---|---|
container_issue | |
container_start_page | 1951 |
container_title | |
container_volume | |
creator | Harpe, Pieter Zanikopoulos, Athon Hegt, Hans van Roermund, Arthur |
description | This paper presents a method for the on-chip measurement and correction of gain errors, offsets and non-linearities of a Track-and-Hold circuit (T&H) of an ADC. Open-loop T&H circuits will be considered in this paper because of their high-speed and low-power capabilities. However, these open-loop circuits require calibration for the aforementioned errors in order to achieve a high accuracy, especially in case of time-interleaved architectures. With the proposed method, the errors can be measured and digitized on-chip accurately, without requiring a substantial amount of hardware or any accurate references. Then, this information is used by a digitally implemented algorithm to optimize several digitally controlled analog parameters of the circuit. In turn, these parameters minimize the effect of mismatch errors. After optimization, the digital logic can be switched off completely in order to save power. |
doi_str_mv | 10.1109/ISCAS.2007.378358 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4253047</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4253047</ieee_id><sourcerecordid>4253047</sourcerecordid><originalsourceid>FETCH-LOGICAL-i241t-f9fb5c758ba9a4fa3f1c6fbdc9dcef7c404989193d8dbcad1ab10be91ea49d9c3</originalsourceid><addsrcrecordid>eNo1jMlOwzAUAM0mUUo_AHHxD7j4ecHxMQpLKxX10HKunjcwpHGVBCT-HiRgLnMYaQi5Aj4H4PZmuWnqzVxwbubSVFJXR2RmTQVKKMWtADgmEwG6YqCFPiEX_4HbUzLhwgBTkotzMhuGN_6D0tLy2wnBusO2vNAG2-x6HHPpaEn0KQ97HP1rHGjuKHZ0fYgdW5VyoNse_TvDLrBFaQNtcu8_8khT6ek27yNbdmPs24ifMdD6rhkuyVnCdoizP0_J88P9tlmw1fpx2dQrloWCkSWbnPZGVw4tqoQygb9NLngbfEzGK65sZcHKUAXnMQA64C5aiKhssF5OyfXvN8cYd4c-77H_2imhJVdGfgP7K1qH</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Harpe, Pieter ; Zanikopoulos, Athon ; Hegt, Hans ; van Roermund, Arthur</creator><creatorcontrib>Harpe, Pieter ; Zanikopoulos, Athon ; Hegt, Hans ; van Roermund, Arthur</creatorcontrib><description>This paper presents a method for the on-chip measurement and correction of gain errors, offsets and non-linearities of a Track-and-Hold circuit (T&H) of an ADC. Open-loop T&H circuits will be considered in this paper because of their high-speed and low-power capabilities. However, these open-loop circuits require calibration for the aforementioned errors in order to achieve a high accuracy, especially in case of time-interleaved architectures. With the proposed method, the errors can be measured and digitized on-chip accurately, without requiring a substantial amount of hardware or any accurate references. Then, this information is used by a digitally implemented algorithm to optimize several digitally controlled analog parameters of the circuit. In turn, these parameters minimize the effect of mismatch errors. After optimization, the digital logic can be switched off completely in order to save power.</description><identifier>ISSN: 0271-4302</identifier><identifier>ISBN: 1424409209</identifier><identifier>ISBN: 9781424409204</identifier><identifier>EISSN: 2158-1525</identifier><identifier>EISBN: 9781424409211</identifier><identifier>EISBN: 1424409217</identifier><identifier>DOI: 10.1109/ISCAS.2007.378358</identifier><language>eng</language><publisher>IEEE</publisher><subject>Boosting ; Calibration ; Circuit simulation ; CMOS technology ; Digital control ; Error correction ; Gain measurement ; Hardware ; Microelectronics ; Sampling methods</subject><ispartof>2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1951-1954</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4253047$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4253047$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Harpe, Pieter</creatorcontrib><creatorcontrib>Zanikopoulos, Athon</creatorcontrib><creatorcontrib>Hegt, Hans</creatorcontrib><creatorcontrib>van Roermund, Arthur</creatorcontrib><title>Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs</title><title>2007 IEEE International Symposium on Circuits and Systems (ISCAS)</title><addtitle>ISCAS</addtitle><description>This paper presents a method for the on-chip measurement and correction of gain errors, offsets and non-linearities of a Track-and-Hold circuit (T&H) of an ADC. Open-loop T&H circuits will be considered in this paper because of their high-speed and low-power capabilities. However, these open-loop circuits require calibration for the aforementioned errors in order to achieve a high accuracy, especially in case of time-interleaved architectures. With the proposed method, the errors can be measured and digitized on-chip accurately, without requiring a substantial amount of hardware or any accurate references. Then, this information is used by a digitally implemented algorithm to optimize several digitally controlled analog parameters of the circuit. In turn, these parameters minimize the effect of mismatch errors. After optimization, the digital logic can be switched off completely in order to save power.</description><subject>Boosting</subject><subject>Calibration</subject><subject>Circuit simulation</subject><subject>CMOS technology</subject><subject>Digital control</subject><subject>Error correction</subject><subject>Gain measurement</subject><subject>Hardware</subject><subject>Microelectronics</subject><subject>Sampling methods</subject><issn>0271-4302</issn><issn>2158-1525</issn><isbn>1424409209</isbn><isbn>9781424409204</isbn><isbn>9781424409211</isbn><isbn>1424409217</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1jMlOwzAUAM0mUUo_AHHxD7j4ecHxMQpLKxX10HKunjcwpHGVBCT-HiRgLnMYaQi5Aj4H4PZmuWnqzVxwbubSVFJXR2RmTQVKKMWtADgmEwG6YqCFPiEX_4HbUzLhwgBTkotzMhuGN_6D0tLy2wnBusO2vNAG2-x6HHPpaEn0KQ97HP1rHGjuKHZ0fYgdW5VyoNse_TvDLrBFaQNtcu8_8khT6ek27yNbdmPs24ifMdD6rhkuyVnCdoizP0_J88P9tlmw1fpx2dQrloWCkSWbnPZGVw4tqoQygb9NLngbfEzGK65sZcHKUAXnMQA64C5aiKhssF5OyfXvN8cYd4c-77H_2imhJVdGfgP7K1qH</recordid><startdate>200705</startdate><enddate>200705</enddate><creator>Harpe, Pieter</creator><creator>Zanikopoulos, Athon</creator><creator>Hegt, Hans</creator><creator>van Roermund, Arthur</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200705</creationdate><title>Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs</title><author>Harpe, Pieter ; Zanikopoulos, Athon ; Hegt, Hans ; van Roermund, Arthur</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i241t-f9fb5c758ba9a4fa3f1c6fbdc9dcef7c404989193d8dbcad1ab10be91ea49d9c3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Boosting</topic><topic>Calibration</topic><topic>Circuit simulation</topic><topic>CMOS technology</topic><topic>Digital control</topic><topic>Error correction</topic><topic>Gain measurement</topic><topic>Hardware</topic><topic>Microelectronics</topic><topic>Sampling methods</topic><toplevel>online_resources</toplevel><creatorcontrib>Harpe, Pieter</creatorcontrib><creatorcontrib>Zanikopoulos, Athon</creatorcontrib><creatorcontrib>Hegt, Hans</creatorcontrib><creatorcontrib>van Roermund, Arthur</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Harpe, Pieter</au><au>Zanikopoulos, Athon</au><au>Hegt, Hans</au><au>van Roermund, Arthur</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs</atitle><btitle>2007 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>2007-05</date><risdate>2007</risdate><spage>1951</spage><epage>1954</epage><pages>1951-1954</pages><issn>0271-4302</issn><eissn>2158-1525</eissn><isbn>1424409209</isbn><isbn>9781424409204</isbn><eisbn>9781424409211</eisbn><eisbn>1424409217</eisbn><abstract>This paper presents a method for the on-chip measurement and correction of gain errors, offsets and non-linearities of a Track-and-Hold circuit (T&H) of an ADC. Open-loop T&H circuits will be considered in this paper because of their high-speed and low-power capabilities. However, these open-loop circuits require calibration for the aforementioned errors in order to achieve a high accuracy, especially in case of time-interleaved architectures. With the proposed method, the errors can be measured and digitized on-chip accurately, without requiring a substantial amount of hardware or any accurate references. Then, this information is used by a digitally implemented algorithm to optimize several digitally controlled analog parameters of the circuit. In turn, these parameters minimize the effect of mismatch errors. After optimization, the digital logic can be switched off completely in order to save power.</abstract><pub>IEEE</pub><doi>10.1109/ISCAS.2007.378358</doi><tpages>4</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0271-4302 |
ispartof | 2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1951-1954 |
issn | 0271-4302 2158-1525 |
language | eng |
recordid | cdi_ieee_primary_4253047 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Boosting Calibration Circuit simulation CMOS technology Digital control Error correction Gain measurement Hardware Microelectronics Sampling methods |
title | Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-01T11%3A27%3A28IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Analog%20Calibration%20of%20Mismatches%20in%20an%20Open-Loop%20Track-and-Hold%20Circuit%20for%20Time-Interleaved%20ADCs&rft.btitle=2007%20IEEE%20International%20Symposium%20on%20Circuits%20and%20Systems%20(ISCAS)&rft.au=Harpe,%20Pieter&rft.date=2007-05&rft.spage=1951&rft.epage=1954&rft.pages=1951-1954&rft.issn=0271-4302&rft.eissn=2158-1525&rft.isbn=1424409209&rft.isbn_list=9781424409204&rft_id=info:doi/10.1109/ISCAS.2007.378358&rft_dat=%3Cieee_6IE%3E4253047%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=9781424409211&rft.eisbn_list=1424409217&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4253047&rfr_iscdi=true |