Low-latency Memory-efficient 150-Mbps Turbo FEC Encoder and Decoder

A high-speed turbo FEC code was proposed in the HomePlug AV standard for 200-Mbps high-data-rate home networking systems over power lines. In this paper, we demonstrate an efficient implementation of the FEC core to meet the high throughput requirement with lowered latency and lowered memory costs....

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Kuo, Tzu-Chieh, Willson, Alan N.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Clocks Convolutional codes Forward error correction Iterative decoding OFDM modulation Payloads Physical layer Quadrature amplitude modulation Throughput Turbo codes
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