A Self-Calibrated Multiphase DLL-Based Clock Generator
A delay-locked loop (DLL) Integrated with an analog self-calibration circuit is presented. The proposed DLL can generate precise multiphase clocks over process corners, voltage/temperature variations and device mismatches when incorporating with the calibration circuit and variable-delay output buff...
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| creator | Hsin-Shu Chen Chao-Ching Hung |
| description | A delay-locked loop (DLL) Integrated with an analog self-calibration circuit is presented. The proposed DLL can generate precise multiphase clocks over process corners, voltage/temperature variations and device mismatches when incorporating with the calibration circuit and variable-delay output buffers. The experimental circuit in a standard 0.35-mum CMOS process demonstrates delay mismatch between phases can be reduced from tens of pico-second to less than ten pico-seconds at 100 MHz. The prototype circuit occupies an area of 2.1 mm 2 , and consumes around 10.1 mW at 3.3 V. |
| doi_str_mv | 10.1109/VDAT.2007.373237 |
| format | Conference Proceeding |
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The proposed DLL can generate precise multiphase clocks over process corners, voltage/temperature variations and device mismatches when incorporating with the calibration circuit and variable-delay output buffers. The experimental circuit in a standard 0.35-mum CMOS process demonstrates delay mismatch between phases can be reduced from tens of pico-second to less than ten pico-seconds at 100 MHz. The prototype circuit occupies an area of 2.1 mm 2 , and consumes around 10.1 mW at 3.3 V.</description><identifier>ISBN: 1424405823</identifier><identifier>ISBN: 9781424405824</identifier><identifier>EISBN: 9781424405831</identifier><identifier>EISBN: 1424405831</identifier><identifier>DOI: 10.1109/VDAT.2007.373237</identifier><language>eng</language><publisher>IEEE</publisher><subject>Calibration ; Clocks ; Delay effects ; Delay lines ; Feedback circuits ; Phase detection ; Phase frequency detector ; Quantization ; Temperature ; Voltage</subject><ispartof>2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2007, p.1-4</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4239429$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4239429$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Hsin-Shu Chen</creatorcontrib><creatorcontrib>Chao-Ching Hung</creatorcontrib><title>A Self-Calibrated Multiphase DLL-Based Clock Generator</title><title>2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)</title><addtitle>VDAT</addtitle><description>A delay-locked loop (DLL) Integrated with an analog self-calibration circuit is presented. The proposed DLL can generate precise multiphase clocks over process corners, voltage/temperature variations and device mismatches when incorporating with the calibration circuit and variable-delay output buffers. The experimental circuit in a standard 0.35-mum CMOS process demonstrates delay mismatch between phases can be reduced from tens of pico-second to less than ten pico-seconds at 100 MHz. The prototype circuit occupies an area of 2.1 mm 2 , and consumes around 10.1 mW at 3.3 V.</description><subject>Calibration</subject><subject>Clocks</subject><subject>Delay effects</subject><subject>Delay lines</subject><subject>Feedback circuits</subject><subject>Phase detection</subject><subject>Phase frequency detector</subject><subject>Quantization</subject><subject>Temperature</subject><subject>Voltage</subject><isbn>1424405823</isbn><isbn>9781424405824</isbn><isbn>9781424405831</isbn><isbn>1424405831</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1jM1KxEAQhEdEUNfcBS95gcTu-UlPH2NWVyHiweB1mUk6GI3ukqwH396AWpeqjypKqUuEHBH4-mVdNrkGoNyQ0YaOVMLk0WprwXmDx-r8H7Q5Vck8v8Eiw4TszlRRps8y9lkVxiFO4SBd-vg1Hob9a5glXdd1drOELq3GXfuebuRTltFuulAnfRhnSf58pZq726a6z-qnzUNV1tnAcMgsFNq0BToiiMR9H5CcZdCtjuBlqTi26HxHPhJ0McQ2IohDZz0HTWalrn5vBxHZ7qfhI0zfW6sNW83mB-N7RFg</recordid><startdate>200704</startdate><enddate>200704</enddate><creator>Hsin-Shu Chen</creator><creator>Chao-Ching Hung</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200704</creationdate><title>A Self-Calibrated Multiphase DLL-Based Clock Generator</title><author>Hsin-Shu Chen ; Chao-Ching Hung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-40623c615770b79ffa1754902c2b08e3c69bc158d78b70dbabcb10e515489a273</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Calibration</topic><topic>Clocks</topic><topic>Delay effects</topic><topic>Delay lines</topic><topic>Feedback circuits</topic><topic>Phase detection</topic><topic>Phase frequency detector</topic><topic>Quantization</topic><topic>Temperature</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Hsin-Shu Chen</creatorcontrib><creatorcontrib>Chao-Ching Hung</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hsin-Shu Chen</au><au>Chao-Ching Hung</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A Self-Calibrated Multiphase DLL-Based Clock Generator</atitle><btitle>2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)</btitle><stitle>VDAT</stitle><date>2007-04</date><risdate>2007</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><isbn>1424405823</isbn><isbn>9781424405824</isbn><eisbn>9781424405831</eisbn><eisbn>1424405831</eisbn><abstract>A delay-locked loop (DLL) Integrated with an analog self-calibration circuit is presented. The proposed DLL can generate precise multiphase clocks over process corners, voltage/temperature variations and device mismatches when incorporating with the calibration circuit and variable-delay output buffers. The experimental circuit in a standard 0.35-mum CMOS process demonstrates delay mismatch between phases can be reduced from tens of pico-second to less than ten pico-seconds at 100 MHz. The prototype circuit occupies an area of 2.1 mm 2 , and consumes around 10.1 mW at 3.3 V.</abstract><pub>IEEE</pub><doi>10.1109/VDAT.2007.373237</doi><tpages>4</tpages></addata></record> |
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| ispartof | 2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2007, p.1-4 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Calibration Clocks Delay effects Delay lines Feedback circuits Phase detection Phase frequency detector Quantization Temperature Voltage |
| title | A Self-Calibrated Multiphase DLL-Based Clock Generator |
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