Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems

Code compression has been applied to embedded systems to minimize the silicon area utilized for program memories, and lower the power consumption. More recently, it has become a necessity for multiple-issue architectures, such as VLIW and TTA, to permit a viable realization of these designs. In this...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Aslam, N., Milward, M., Nousias, I., Arslan, T., Erdogan, A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Bandwidth Computer architecture Delay Embedded system Energy consumption Parallel processing Reconfigurable architectures Silicon Throughput VLIW
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