A Reconfigurable Processor for the Cryptographic ηT Pairing in Characteristic 3
Recently, there have been many proposals for secure and novel cryptographic protocols that are built on bilinear pairings. The eta T pairing is one such pairing and is closely related to the Tate pairing. In this paper we consider the efficient hardware implementation of this pairing in characterist...
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| creator | Ronan, R. hEigeartaigh, C.O. Murphy, C. Kerins, T. Barretto, P.S.L.M. |
| description | Recently, there have been many proposals for secure and novel cryptographic protocols that are built on bilinear pairings. The eta T pairing is one such pairing and is closely related to the Tate pairing. In this paper we consider the efficient hardware implementation of this pairing in characteristic 3. All characteristic 3 operations required to compute the pairing are outlined in detail. An efficient, flexible and reconfigurable processor for the eta T pairing in characteristic 3 is presented and discussed. The processor can easily be tailored for a low area implementation, for a high throughput implementation, or for a balance between the two. Results are provided for various configurations of the processor when implemented over the field F 397 on an FPGA |
| doi_str_mv | 10.1109/ITNG.2007.19 |
| format | Conference Proceeding |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Arithmetic Cryptographic protocols Elliptic curve cryptography Elliptic curves Field programmable gate arrays Hardware Identity-based encryption Iterative algorithms Proposals Throughput |
| title | A Reconfigurable Processor for the Cryptographic ηT Pairing in Characteristic 3 |
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