A Unified Optimal Voltage Selection Methodology for Low-Power Systems

Reduction in power consumption has been an important concern in low-power and high-performance systems. This paper addresses the problem of static voltage scaling in such systems which is a well studied technique. In this paper we present an optimal methodology for static voltage scaling. Previous t...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Dabiri, F., Jafari, R., Nahapetian, A., Sarrafzadeh, M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS digital integrated circuits Constraint optimization Dynamic voltage scaling Energy consumption Polynomials Power dissipation Runtime Threshold voltage Timing Very large scale integration
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