Power Estimation for IP-Based Modules

In this paper, we propose a power estimation technique for register transfer level model of digital circuits. This technique allows to estimate the power dissipation of intellectual property (IP) components based on the statistical knowledge of their primary inputs/outputs. During power estimation p...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Durrani, Y.A., Riesgo, T.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuit simulation Computational modeling Digital circuits Electronics industry Interpolation Power dissipation Power generation Registers Statistics Table lookup
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