Design For At-Speed Structural Test And Performance Verification Of High-Performance ASICs
Performance verification is critical to high-performance ASICs manufacturing. Performance verification ensures that only those chips whose performance is higher than an advertised threshold are shipped to demanding customers. This provides a means to weed out nominal performance ASICs, and also ship...
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| creator | Iyengar, V. Johnson, M. Anemikos, T. Grise, G. Taylor, M. Farmer, R. Woytowich, F. Bassett, B. |
| description | Performance verification is critical to high-performance ASICs manufacturing. Performance verification ensures that only those chips whose performance is higher than an advertised threshold are shipped to demanding customers. This provides a means to weed out nominal performance ASICs, and also ship ASICs at difference grades. At-speed structural test can provide performance verification capability at very low cost. In this paper, we present a scalable and flexible structural test method for performance verification of ASICs. The proposed method requires no tight restrictions on the circuit design. Moreover, low-cost testers are used, thus sharply reducing test cost |
| doi_str_mv | 10.1109/CICC.2006.320991 |
| format | Conference Proceeding |
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Performance verification ensures that only those chips whose performance is higher than an advertised threshold are shipped to demanding customers. This provides a means to weed out nominal performance ASICs, and also ship ASICs at difference grades. At-speed structural test can provide performance verification capability at very low cost. In this paper, we present a scalable and flexible structural test method for performance verification of ASICs. The proposed method requires no tight restrictions on the circuit design. Moreover, low-cost testers are used, thus sharply reducing test cost</abstract><pub>IEEE</pub><doi>10.1109/CICC.2006.320991</doi><tpages>4</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0886-5930 |
| ispartof | IEEE Custom Integrated Circuits Conference 2006, 2006, p.567-570 |
| issn | 0886-5930 2152-3630 |
| language | eng |
| recordid | cdi_ieee_primary_4115023 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Circuit faults Circuit synthesis Circuit testing Clocks Costs Delay Logic testing Manufacturing Marine vehicles Timing |
| title | Design For At-Speed Structural Test And Performance Verification Of High-Performance ASICs |
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