A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers
Switched-capacitor biased pseudo-differential split-path cascode amplifiers are proposed to achieve high power efficiency and small die area for a 14-bit 2.5MS/s DeltaSigma modulator. Sufficient power supply rejection is maintained through the biasing circuit. A novel signal and reference sampling n...
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| creator | Zhiheng Cao Tongyu Song Shouli Yan |
| description | Switched-capacitor biased pseudo-differential split-path cascode amplifiers are proposed to achieve high power efficiency and small die area for a 14-bit 2.5MS/s DeltaSigma modulator. Sufficient power supply rejection is maintained through the biasing circuit. A novel signal and reference sampling network eliminates input common-mode voltages and relaxes op-amp linearity requirements, making it possible to use short channel length transistors for speed and power efficiency. A prototype chip is fabricated in a 0.25mum CMOS technology with a core area of 0.27mm 2 . Experimental results show that 84dB dynamic range is achieved with the 1.25MHz signal bandwidth when clocked at 120MHz. The power dissipation is 14mW at 2.5V including the on-chip voltage reference buffers |
| doi_str_mv | 10.1109/CICC.2006.320961 |
| format | Conference Proceeding |
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Sufficient power supply rejection is maintained through the biasing circuit. A novel signal and reference sampling network eliminates input common-mode voltages and relaxes op-amp linearity requirements, making it possible to use short channel length transistors for speed and power efficiency. A prototype chip is fabricated in a 0.25mum CMOS technology with a core area of 0.27mm 2 . Experimental results show that 84dB dynamic range is achieved with the 1.25MHz signal bandwidth when clocked at 120MHz. The power dissipation is 14mW at 2.5V including the on-chip voltage reference buffers</description><subject>Circuits</subject><subject>CMOS technology</subject><subject>Delta modulation</subject><subject>Delta-sigma modulation</subject><subject>High power amplifiers</subject><subject>Linearity</subject><subject>Operational amplifiers</subject><subject>Power supplies</subject><subject>Sampling methods</subject><subject>Voltage</subject><issn>0886-5930</issn><issn>2152-3630</issn><isbn>1424400759</isbn><isbn>9781424400751</isbn><isbn>9781424400768</isbn><isbn>1424400767</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo1jMlqwzAURdUJmqTZF7rRD8h5ehosLYM7BRIaSEOXQbalVMWOg-Us-vcNtF1dzjlwCbnnkHEOdlYsiiJDAJ0JBKv5BZna3HCJUgLk2lySEXKFTGgBV2T8H5S9JiMwRjNlBdyScUpfANxagyNSzimX7QfFTK02s3SGMg50E_etY4--GRxddfWpcUPX022Khz1dJ3-qO_YYQ_C9PwzRNXRzbOLA1m74pIVLVVd7Om_PLkTfpztyE1yT_PRvJ2T7_PRevLLl28uimC9Z5LkamA65yktdQlUbL4XDUGms8godDwZDkEKBCAZqXXMMSjlrS_BVQNSlC8GJCXn4_Y3e-92xj63rv3eSc2lBix-vZlfu</recordid><startdate>200609</startdate><enddate>200609</enddate><creator>Zhiheng Cao</creator><creator>Tongyu Song</creator><creator>Shouli Yan</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200609</creationdate><title>A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers</title><author>Zhiheng Cao ; Tongyu Song ; Shouli Yan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-6f757b6b0cd8e43a2fc62c7c2a1f82ff43503f80d6d12f55a99b0ecf226baffa3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Circuits</topic><topic>CMOS technology</topic><topic>Delta modulation</topic><topic>Delta-sigma modulation</topic><topic>High power amplifiers</topic><topic>Linearity</topic><topic>Operational amplifiers</topic><topic>Power supplies</topic><topic>Sampling methods</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Zhiheng Cao</creatorcontrib><creatorcontrib>Tongyu Song</creatorcontrib><creatorcontrib>Shouli Yan</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zhiheng Cao</au><au>Tongyu Song</au><au>Shouli Yan</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers</atitle><btitle>IEEE Custom Integrated Circuits Conference 2006</btitle><stitle>CICC</stitle><date>2006-09</date><risdate>2006</risdate><spage>49</spage><epage>52</epage><pages>49-52</pages><issn>0886-5930</issn><eissn>2152-3630</eissn><isbn>1424400759</isbn><isbn>9781424400751</isbn><eisbn>9781424400768</eisbn><eisbn>1424400767</eisbn><abstract>Switched-capacitor biased pseudo-differential split-path cascode amplifiers are proposed to achieve high power efficiency and small die area for a 14-bit 2.5MS/s DeltaSigma modulator. Sufficient power supply rejection is maintained through the biasing circuit. A novel signal and reference sampling network eliminates input common-mode voltages and relaxes op-amp linearity requirements, making it possible to use short channel length transistors for speed and power efficiency. A prototype chip is fabricated in a 0.25mum CMOS technology with a core area of 0.27mm 2 . Experimental results show that 84dB dynamic range is achieved with the 1.25MHz signal bandwidth when clocked at 120MHz. The power dissipation is 14mW at 2.5V including the on-chip voltage reference buffers</abstract><pub>IEEE</pub><doi>10.1109/CICC.2006.320961</doi><tpages>4</tpages></addata></record> |
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| ispartof | IEEE Custom Integrated Circuits Conference 2006, 2006, p.49-52 |
| issn | 0886-5930 2152-3630 |
| language | eng |
| recordid | cdi_ieee_primary_4114906 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Circuits CMOS technology Delta modulation Delta-sigma modulation High power amplifiers Linearity Operational amplifiers Power supplies Sampling methods Voltage |
| title | A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers |
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