A CMOS Low Voltage Charge Pump
Charge pump circuits are used for obtaining higher voltages than normal power supply voltage in flash memories, DRAMs and low voltage designs. In this paper, we present a charge pump circuit in standard CMOS technology that is suited for low voltage operation. Our proposed charge pump uses a cross-...
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creator | Bhalerao, S.A. Chaudhary, A.V. Patrikar, R.M. |
description | Charge pump circuits are used for obtaining higher voltages than normal power supply voltage in flash memories, DRAMs and low voltage designs. In this paper, we present a charge pump circuit in standard CMOS technology that is suited for low voltage operation. Our proposed charge pump uses a cross- connected NMOS cell as the basic element and PMOS switches are employed to connect one stage to the next. The simulated output voltages of the proposed 4 stage charge pump for input voltage of 0.9 V, 1.2 V, 1.5 V, 1.8 V and 2.1 V are 3.9 V, 5.1 V, 6.35 V, 7.51 V and 8.4 V respectively. This proposed charge pump is suitable for low power CMOS mixed-mode designs. |
doi_str_mv | 10.1109/VLSID.2007.9 |
format | Conference Proceeding |
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In this paper, we present a charge pump circuit in standard CMOS technology that is suited for low voltage operation. Our proposed charge pump uses a cross- connected NMOS cell as the basic element and PMOS switches are employed to connect one stage to the next. The simulated output voltages of the proposed 4 stage charge pump for input voltage of 0.9 V, 1.2 V, 1.5 V, 1.8 V and 2.1 V are 3.9 V, 5.1 V, 6.35 V, 7.51 V and 8.4 V respectively. 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In this paper, we present a charge pump circuit in standard CMOS technology that is suited for low voltage operation. Our proposed charge pump uses a cross- connected NMOS cell as the basic element and PMOS switches are employed to connect one stage to the next. The simulated output voltages of the proposed 4 stage charge pump for input voltage of 0.9 V, 1.2 V, 1.5 V, 1.8 V and 2.1 V are 3.9 V, 5.1 V, 6.35 V, 7.51 V and 8.4 V respectively. This proposed charge pump is suitable for low power CMOS mixed-mode designs.</description><subject>Capacitors</subject><subject>Charge pumps</subject><subject>Circuits</subject><subject>Clocks</subject><subject>CMOS technology</subject><subject>Diodes</subject><subject>Low voltage</subject><subject>MOS devices</subject><subject>Power supplies</subject><subject>Switches</subject><issn>1063-9667</issn><issn>2380-6923</issn><isbn>0769527620</isbn><isbn>9780769527628</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2007</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotzMtKAzEUANDgA5xWd-4EmR_I9OYmucldlvFVmFKhpduSJhkdaWmZqYh_r6CrsztC3CqolAKerJvl7KFCAFfxmShQe5DEqM_FCByxRUcIF6JQQFoykbsSo2H4AABvwRXiflrW88WybA5f5fqwO4W3XNbvof_l9XN_vBaXbdgN-ebfsVg9Pa7qF9ksnmf1tJEdw0lms6WUkaI3EDFqnZwNW9V6pRxlp5GoZZOBYjLeMbKNnDCBTbrNHIIei7u_tss5b459tw_998YAoyKlfwBppDuE</recordid><startdate>200701</startdate><enddate>200701</enddate><creator>Bhalerao, S.A.</creator><creator>Chaudhary, A.V.</creator><creator>Patrikar, R.M.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200701</creationdate><title>A CMOS Low Voltage Charge Pump</title><author>Bhalerao, S.A. ; Chaudhary, A.V. ; Patrikar, R.M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-e4b6de26c840c2c33d75ab1f81176e73266f94e06cd4879295c9d2d05d3fe9aa3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2007</creationdate><topic>Capacitors</topic><topic>Charge pumps</topic><topic>Circuits</topic><topic>Clocks</topic><topic>CMOS technology</topic><topic>Diodes</topic><topic>Low voltage</topic><topic>MOS devices</topic><topic>Power supplies</topic><topic>Switches</topic><toplevel>online_resources</toplevel><creatorcontrib>Bhalerao, S.A.</creatorcontrib><creatorcontrib>Chaudhary, A.V.</creatorcontrib><creatorcontrib>Patrikar, R.M.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bhalerao, S.A.</au><au>Chaudhary, A.V.</au><au>Patrikar, R.M.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A CMOS Low Voltage Charge Pump</atitle><btitle>20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)</btitle><stitle>VLSID</stitle><date>2007-01</date><risdate>2007</risdate><spage>941</spage><epage>946</epage><pages>941-946</pages><issn>1063-9667</issn><eissn>2380-6923</eissn><isbn>0769527620</isbn><isbn>9780769527628</isbn><abstract>Charge pump circuits are used for obtaining higher voltages than normal power supply voltage in flash memories, DRAMs and low voltage designs. In this paper, we present a charge pump circuit in standard CMOS technology that is suited for low voltage operation. Our proposed charge pump uses a cross- connected NMOS cell as the basic element and PMOS switches are employed to connect one stage to the next. The simulated output voltages of the proposed 4 stage charge pump for input voltage of 0.9 V, 1.2 V, 1.5 V, 1.8 V and 2.1 V are 3.9 V, 5.1 V, 6.35 V, 7.51 V and 8.4 V respectively. This proposed charge pump is suitable for low power CMOS mixed-mode designs.</abstract><pub>IEEE</pub><doi>10.1109/VLSID.2007.9</doi><tpages>6</tpages></addata></record> |
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identifier | ISSN: 1063-9667 |
ispartof | 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07), 2007, p.941-946 |
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language | eng |
recordid | cdi_ieee_primary_4092161 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Capacitors Charge pumps Circuits Clocks CMOS technology Diodes Low voltage MOS devices Power supplies Switches |
title | A CMOS Low Voltage Charge Pump |
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