Ka-Band (35 GHz) Low-noise 180 nm SOI CMOS Amplifier
We present the development of a coplanar waveguide (CPW) Ka-band (35 GHz) low-noise amplifier (LNA) designed in MIT-Lincoln Laboratory (MIT-LL) 180 nm fully depleted silicon-on-insulator (FDSOI) CMOS technology fabricated on a "float zone" (2000 ohm-cm) substrate. The LNA exhibits a noise...
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creator | Riemer, P.J. Prairie, J.F. Buhrow, B.R. Chen, C.L. Keast, C.L. Wyatt, P.W. Randall, B.A. Gilbert, B.K. Daniel, E.S. |
description | We present the development of a coplanar waveguide (CPW) Ka-band (35 GHz) low-noise amplifier (LNA) designed in MIT-Lincoln Laboratory (MIT-LL) 180 nm fully depleted silicon-on-insulator (FDSOI) CMOS technology fabricated on a "float zone" (2000 ohm-cm) substrate. The LNA exhibits a noise figure of 6.5 dB and an associated gain of 6.7 dB at 37 GHz while consuming 27.5 mW of DC power. When biased for maximum gain the LNA exhibits 7.3 dB gain at 35.8 GHz |
doi_str_mv | 10.1109/SOI.2006.284467 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4062915</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4062915</ieee_id><sourcerecordid>4062915</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-6dc68c2190d33a80ecdf3079ad60e7d407a06ebddbd90fb392f3a1fc93a1321b3</originalsourceid><addsrcrecordid>eNpNjT1PwzAURc2XRFU6M7B4hMHhvWfH9htLBG1FUYd2YKuc2JGCmrRKkBD8-laCgeWe4UjnCnGLkCECP65Xi4wAbEbeGOvOxISdR0PGADH4czGi3DlFxPnFf-eZLsUIwXllCd-vxWQYPgAAnTXIZiTMa1BPoYvyXudyNv95kMv9l-r2zZAkepBdK0_fsnhbreW0Peyaukn9jbiqw25Ikz-OxebleVPM1XI1WxTTpWoYPpWNlfUVIUPUOnhIVaw1OA7RQnLRgAtgUxljGRnqUjPVOmBd8Wk1YanH4u4326SUtoe-aUP_vTVgiTHXR4XIRnU</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Ka-Band (35 GHz) Low-noise 180 nm SOI CMOS Amplifier</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Riemer, P.J. ; Prairie, J.F. ; Buhrow, B.R. ; Chen, C.L. ; Keast, C.L. ; Wyatt, P.W. ; Randall, B.A. ; Gilbert, B.K. ; Daniel, E.S.</creator><creatorcontrib>Riemer, P.J. ; Prairie, J.F. ; Buhrow, B.R. ; Chen, C.L. ; Keast, C.L. ; Wyatt, P.W. ; Randall, B.A. ; Gilbert, B.K. ; Daniel, E.S.</creatorcontrib><description>We present the development of a coplanar waveguide (CPW) Ka-band (35 GHz) low-noise amplifier (LNA) designed in MIT-Lincoln Laboratory (MIT-LL) 180 nm fully depleted silicon-on-insulator (FDSOI) CMOS technology fabricated on a "float zone" (2000 ohm-cm) substrate. The LNA exhibits a noise figure of 6.5 dB and an associated gain of 6.7 dB at 37 GHz while consuming 27.5 mW of DC power. When biased for maximum gain the LNA exhibits 7.3 dB gain at 35.8 GHz</description><identifier>ISSN: 1078-621X</identifier><identifier>ISBN: 9781424402892</identifier><identifier>ISBN: 1424402891</identifier><identifier>EISSN: 2577-2295</identifier><identifier>EISBN: 9781424402908</identifier><identifier>EISBN: 1424402905</identifier><identifier>DOI: 10.1109/SOI.2006.284467</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS technology ; Coplanar waveguides ; Fabrication ; Gain ; Laboratories ; Low-noise amplifiers ; MMICs ; Noise figure ; Power transmission lines</subject><ispartof>2006 IEEE international SOI Conferencee Proceedings, 2006, p.125-126</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4062915$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4062915$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Riemer, P.J.</creatorcontrib><creatorcontrib>Prairie, J.F.</creatorcontrib><creatorcontrib>Buhrow, B.R.</creatorcontrib><creatorcontrib>Chen, C.L.</creatorcontrib><creatorcontrib>Keast, C.L.</creatorcontrib><creatorcontrib>Wyatt, P.W.</creatorcontrib><creatorcontrib>Randall, B.A.</creatorcontrib><creatorcontrib>Gilbert, B.K.</creatorcontrib><creatorcontrib>Daniel, E.S.</creatorcontrib><title>Ka-Band (35 GHz) Low-noise 180 nm SOI CMOS Amplifier</title><title>2006 IEEE international SOI Conferencee Proceedings</title><addtitle>SOI</addtitle><description>We present the development of a coplanar waveguide (CPW) Ka-band (35 GHz) low-noise amplifier (LNA) designed in MIT-Lincoln Laboratory (MIT-LL) 180 nm fully depleted silicon-on-insulator (FDSOI) CMOS technology fabricated on a "float zone" (2000 ohm-cm) substrate. The LNA exhibits a noise figure of 6.5 dB and an associated gain of 6.7 dB at 37 GHz while consuming 27.5 mW of DC power. When biased for maximum gain the LNA exhibits 7.3 dB gain at 35.8 GHz</description><subject>CMOS technology</subject><subject>Coplanar waveguides</subject><subject>Fabrication</subject><subject>Gain</subject><subject>Laboratories</subject><subject>Low-noise amplifiers</subject><subject>MMICs</subject><subject>Noise figure</subject><subject>Power transmission lines</subject><issn>1078-621X</issn><issn>2577-2295</issn><isbn>9781424402892</isbn><isbn>1424402891</isbn><isbn>9781424402908</isbn><isbn>1424402905</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpNjT1PwzAURc2XRFU6M7B4hMHhvWfH9htLBG1FUYd2YKuc2JGCmrRKkBD8-laCgeWe4UjnCnGLkCECP65Xi4wAbEbeGOvOxISdR0PGADH4czGi3DlFxPnFf-eZLsUIwXllCd-vxWQYPgAAnTXIZiTMa1BPoYvyXudyNv95kMv9l-r2zZAkepBdK0_fsnhbreW0Peyaukn9jbiqw25Ikz-OxebleVPM1XI1WxTTpWoYPpWNlfUVIUPUOnhIVaw1OA7RQnLRgAtgUxljGRnqUjPVOmBd8Wk1YanH4u4326SUtoe-aUP_vTVgiTHXR4XIRnU</recordid><startdate>200610</startdate><enddate>200610</enddate><creator>Riemer, P.J.</creator><creator>Prairie, J.F.</creator><creator>Buhrow, B.R.</creator><creator>Chen, C.L.</creator><creator>Keast, C.L.</creator><creator>Wyatt, P.W.</creator><creator>Randall, B.A.</creator><creator>Gilbert, B.K.</creator><creator>Daniel, E.S.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200610</creationdate><title>Ka-Band (35 GHz) Low-noise 180 nm SOI CMOS Amplifier</title><author>Riemer, P.J. ; Prairie, J.F. ; Buhrow, B.R. ; Chen, C.L. ; Keast, C.L. ; Wyatt, P.W. ; Randall, B.A. ; Gilbert, B.K. ; Daniel, E.S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-6dc68c2190d33a80ecdf3079ad60e7d407a06ebddbd90fb392f3a1fc93a1321b3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>CMOS technology</topic><topic>Coplanar waveguides</topic><topic>Fabrication</topic><topic>Gain</topic><topic>Laboratories</topic><topic>Low-noise amplifiers</topic><topic>MMICs</topic><topic>Noise figure</topic><topic>Power transmission lines</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Riemer, P.J.</creatorcontrib><creatorcontrib>Prairie, J.F.</creatorcontrib><creatorcontrib>Buhrow, B.R.</creatorcontrib><creatorcontrib>Chen, C.L.</creatorcontrib><creatorcontrib>Keast, C.L.</creatorcontrib><creatorcontrib>Wyatt, P.W.</creatorcontrib><creatorcontrib>Randall, B.A.</creatorcontrib><creatorcontrib>Gilbert, B.K.</creatorcontrib><creatorcontrib>Daniel, E.S.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Riemer, P.J.</au><au>Prairie, J.F.</au><au>Buhrow, B.R.</au><au>Chen, C.L.</au><au>Keast, C.L.</au><au>Wyatt, P.W.</au><au>Randall, B.A.</au><au>Gilbert, B.K.</au><au>Daniel, E.S.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Ka-Band (35 GHz) Low-noise 180 nm SOI CMOS Amplifier</atitle><btitle>2006 IEEE international SOI Conferencee Proceedings</btitle><stitle>SOI</stitle><date>2006-10</date><risdate>2006</risdate><spage>125</spage><epage>126</epage><pages>125-126</pages><issn>1078-621X</issn><eissn>2577-2295</eissn><isbn>9781424402892</isbn><isbn>1424402891</isbn><eisbn>9781424402908</eisbn><eisbn>1424402905</eisbn><abstract>We present the development of a coplanar waveguide (CPW) Ka-band (35 GHz) low-noise amplifier (LNA) designed in MIT-Lincoln Laboratory (MIT-LL) 180 nm fully depleted silicon-on-insulator (FDSOI) CMOS technology fabricated on a "float zone" (2000 ohm-cm) substrate. The LNA exhibits a noise figure of 6.5 dB and an associated gain of 6.7 dB at 37 GHz while consuming 27.5 mW of DC power. When biased for maximum gain the LNA exhibits 7.3 dB gain at 35.8 GHz</abstract><pub>IEEE</pub><doi>10.1109/SOI.2006.284467</doi><tpages>2</tpages></addata></record> |
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subjects | CMOS technology Coplanar waveguides Fabrication Gain Laboratories Low-noise amplifiers MMICs Noise figure Power transmission lines |
title | Ka-Band (35 GHz) Low-noise 180 nm SOI CMOS Amplifier |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T00%3A50%3A56IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Ka-Band%20(35%20GHz)%20Low-noise%20180%20nm%20SOI%20CMOS%20Amplifier&rft.btitle=2006%20IEEE%20international%20SOI%20Conferencee%20Proceedings&rft.au=Riemer,%20P.J.&rft.date=2006-10&rft.spage=125&rft.epage=126&rft.pages=125-126&rft.issn=1078-621X&rft.eissn=2577-2295&rft.isbn=9781424402892&rft.isbn_list=1424402891&rft_id=info:doi/10.1109/SOI.2006.284467&rft_dat=%3Cieee_6IE%3E4062915%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&rft.eisbn=9781424402908&rft.eisbn_list=1424402905&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4062915&rfr_iscdi=true |