Improved force-directed scheduling in high-throughput digital signal processing
This paper discusses improved force-directed scheduling and its application in the design of high-throughput DSP systems, such as real-time video VLSL circuits. We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 1995-08, Vol.14 (8), p.945-960 |
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container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
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creator | Verhaegh, W.F.J. Lippens, P.E.R. Aarts, E.H.L. Korst, J.H.M. van Meerbergen, J.L. van der Werf, A. |
description | This paper discusses improved force-directed scheduling and its application in the design of high-throughput DSP systems, such as real-time video VLSL circuits. We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show how the algorithm can be used to find cost-effective time assignments and resource allocations, allowing trade-offs between processing units and memories. Furthermore, we present modifications that improve the effectiveness and the efficiency of the algorithm. The significance of the improvements is illustrated by an empirical performance analysis based on a number of problem instances.< > |
doi_str_mv | 10.1109/43.402495 |
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We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show how the algorithm can be used to find cost-effective time assignments and resource allocations, allowing trade-offs between processing units and memories. Furthermore, we present modifications that improve the effectiveness and the efficiency of the algorithm. The significance of the improvements is illustrated by an empirical performance analysis based on a number of problem instances.< ></description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/43.402495</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Clocks ; Design. Technologies. Operation analysis. Testing ; Digital signal processing ; Electronics ; Exact sciences and technology ; Flow graphs ; Frequency ; Integrated circuits ; Laboratories ; Pipeline processing ; Semiconductor electronics. Microelectronics. Optoelectronics. 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We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show how the algorithm can be used to find cost-effective time assignments and resource allocations, allowing trade-offs between processing units and memories. Furthermore, we present modifications that improve the effectiveness and the efficiency of the algorithm. The significance of the improvements is illustrated by an empirical performance analysis based on a number of problem instances.< ></description><subject>Applied sciences</subject><subject>Clocks</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Digital signal processing</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Flow graphs</subject><subject>Frequency</subject><subject>Integrated circuits</subject><subject>Laboratories</subject><subject>Pipeline processing</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Signal design</subject><subject>Signal processing algorithms</subject><subject>Signal sampling</subject><subject>Signal synthesis</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1995</creationdate><recordtype>article</recordtype><recordid>eNo9kDtPwzAUhS0EEqUwsDJlYGFwuX7VyYgqHpUqdYE5sp2bxChNIjtF4t9jlKrT0dX9zjccQu4ZrBiD4lmKlQQuC3VBFqwQmkqm2CVZANc5BdBwTW5i_AZgUvFiQfbbwxiGH6yyeggOaeUDuimd0bVYHTvfN5nvs9Y3LZ3aMBybdjxOWeUbP5kui77pUySFwxgTfEuuatNFvDvlkny9vX5uPuhu_77dvOyoEwwmKuraaVshOFRSImiB1mnDreMoLFqLGpUQNtHGIl-vbe6YypFzwaucCbEkT7PXhSHGgHU5Bn8w4bdkUP4vUUpRzksk9nFmRxOd6epgeufjuSDWnCsmE_YwYx4Rz9-T4w82rGd8</recordid><startdate>19950801</startdate><enddate>19950801</enddate><creator>Verhaegh, W.F.J.</creator><creator>Lippens, P.E.R.</creator><creator>Aarts, E.H.L.</creator><creator>Korst, J.H.M.</creator><creator>van Meerbergen, J.L.</creator><creator>van der Werf, A.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>19950801</creationdate><title>Improved force-directed scheduling in high-throughput digital signal processing</title><author>Verhaegh, W.F.J. ; Lippens, P.E.R. ; Aarts, E.H.L. ; Korst, J.H.M. ; van Meerbergen, J.L. ; van der Werf, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c310t-3ffc7bde0ce544e073ebc7a2bc2e3bebbe7e533bc31abe266b8c158e2232d8133</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1995</creationdate><topic>Applied sciences</topic><topic>Clocks</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Digital signal processing</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Flow graphs</topic><topic>Frequency</topic><topic>Integrated circuits</topic><topic>Laboratories</topic><topic>Pipeline processing</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Signal design</topic><topic>Signal processing algorithms</topic><topic>Signal sampling</topic><topic>Signal synthesis</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Verhaegh, W.F.J.</creatorcontrib><creatorcontrib>Lippens, P.E.R.</creatorcontrib><creatorcontrib>Aarts, E.H.L.</creatorcontrib><creatorcontrib>Korst, J.H.M.</creatorcontrib><creatorcontrib>van Meerbergen, J.L.</creatorcontrib><creatorcontrib>van der Werf, A.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Verhaegh, W.F.J.</au><au>Lippens, P.E.R.</au><au>Aarts, E.H.L.</au><au>Korst, J.H.M.</au><au>van Meerbergen, J.L.</au><au>van der Werf, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Improved force-directed scheduling in high-throughput digital signal processing</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>1995-08-01</date><risdate>1995</risdate><volume>14</volume><issue>8</issue><spage>945</spage><epage>960</epage><pages>945-960</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>This paper discusses improved force-directed scheduling and its application in the design of high-throughput DSP systems, such as real-time video VLSL circuits. We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show how the algorithm can be used to find cost-effective time assignments and resource allocations, allowing trade-offs between processing units and memories. Furthermore, we present modifications that improve the effectiveness and the efficiency of the algorithm. The significance of the improvements is illustrated by an empirical performance analysis based on a number of problem instances.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/43.402495</doi><tpages>16</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Applied sciences Clocks Design. Technologies. Operation analysis. Testing Digital signal processing Electronics Exact sciences and technology Flow graphs Frequency Integrated circuits Laboratories Pipeline processing Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal design Signal processing algorithms Signal sampling Signal synthesis |
title | Improved force-directed scheduling in high-throughput digital signal processing |
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