A manufacturable complementary GaAs process

A self-aligned complementary GaAs heterostructure FET process has been established for low power, high-speed digital circuits. The devices are fabricated on four-inch MBE epitaxial wafers consisting of AlGaAs/InGaAs epilayers grown on LEC GaAs substrates. The process uses twelve lithographic steps i...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Abrokwah, J.K., Huang, J.H., Ooms, W., Shurboff, C., Hallmark, J.A., Lucero, R., Gilbert, J., Bernhards, B., Hansell, G.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Digital circuits FETs Gallium arsenide Indium gallium arsenide Integrated circuit interconnections Manufacturing processes Molecular beam epitaxial growth Propagation delay Ring oscillators Substrates
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