Schemes of dynamic redundancy for fault tolerance in random access memories
For large memory capacities, stand-by systems usually need a considerable amount of redundant hardware, not only because of the spare components, but for storing fault conditions and for carrying out the necessary reconfiguration. As alternatives, two methods of implementing fault tolerance by means...
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| Veröffentlicht in: | IEEE transactions on reliability 1988-08, Vol.37 (3), p.331-339 |
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| container_end_page | 339 |
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| container_title | IEEE transactions on reliability |
| container_volume | 37 |
| creator | Grosspietsch, K.E. |
| description | For large memory capacities, stand-by systems usually need a considerable amount of redundant hardware, not only because of the spare components, but for storing fault conditions and for carrying out the necessary reconfiguration. As alternatives, two methods of implementing fault tolerance by means of dynamic redundancy in random-access memories are proposed which allow the treatment of memory-chip faults at the interface of the memory. The memory reliability for both approaches is estimated by a simple model. These methods improve the reliability considerably compared to conventional memory fault tolerance methods, and the size of the units of reconfiguration can be tailored to the demands of the system user.< > |
| doi_str_mv | 10.1109/24.3764 |
| format | Article |
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These methods improve the reliability considerably compared to conventional memory fault tolerance methods, and the size of the units of reconfiguration can be tailored to the demands of the system user.< ></description><subject>Applied sciences</subject><subject>Circuit faults</subject><subject>Degradation</subject><subject>Electronics</subject><subject>Error correction codes</subject><subject>Exact sciences and technology</subject><subject>Fault tolerance</subject><subject>Fault tolerant systems</subject><subject>Hardware</subject><subject>Random access memory</subject><subject>Redundancy</subject><subject>Reliability</subject><subject>Reliability engineering</subject><subject>Very large scale integration</subject><issn>0018-9529</issn><issn>1558-1721</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1988</creationdate><recordtype>article</recordtype><recordid>eNqFkM1LAzEQxYMoWKt49ZiD6GlrJptsk6OIX1jwoJ6XbDLBlf2oye6h_71ZW3othMm85Meb4RFyCWwBwPQdF4t8WYgjMgMpVQZLDsdkxhioTEuuT8lZjD9JCqHVjLx92G9sMdLeU7fpTFtbGtCNnTOd3VDfB-rN2Ax06BsM6Q1p3dHUuL6lxlqMkbbY9qHGeE5OvGkiXuzuOfl6evx8eMlW78-vD_erzOYFH7JUmIYcCiG4yS13VY5GVw6YrzTXWkuoROUUR6U8rwpmQYokQGuOTol8Tm62vuvQ_44Yh7Kto8WmMR32Yyy5lopJrg6DSiqep3MQlCkwSEvPye0WtKGPMaAv16FuTdiUwMop_pKLcoo_kdc7SxOtafyUXR33-JIVWsM0-WqL1Yi4__13-AM4sYo3</recordid><startdate>19880801</startdate><enddate>19880801</enddate><creator>Grosspietsch, K.E.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>7TB</scope><scope>FR3</scope></search><sort><creationdate>19880801</creationdate><title>Schemes of dynamic redundancy for fault tolerance in random access memories</title><author>Grosspietsch, K.E.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c362t-362091316442a3c2db3ea9bd10fb9299951b4bd82e88f2b60c1542e81992ed843</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1988</creationdate><topic>Applied sciences</topic><topic>Circuit faults</topic><topic>Degradation</topic><topic>Electronics</topic><topic>Error correction codes</topic><topic>Exact sciences and technology</topic><topic>Fault tolerance</topic><topic>Fault tolerant systems</topic><topic>Hardware</topic><topic>Random access memory</topic><topic>Redundancy</topic><topic>Reliability</topic><topic>Reliability engineering</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Grosspietsch, K.E.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on reliability</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Grosspietsch, K.E.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Schemes of dynamic redundancy for fault tolerance in random access memories</atitle><jtitle>IEEE transactions on reliability</jtitle><stitle>TR</stitle><date>1988-08-01</date><risdate>1988</risdate><volume>37</volume><issue>3</issue><spage>331</spage><epage>339</epage><pages>331-339</pages><issn>0018-9529</issn><eissn>1558-1721</eissn><coden>IERQAD</coden><abstract>For large memory capacities, stand-by systems usually need a considerable amount of redundant hardware, not only because of the spare components, but for storing fault conditions and for carrying out the necessary reconfiguration. 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| identifier | ISSN: 0018-9529 |
| ispartof | IEEE transactions on reliability, 1988-08, Vol.37 (3), p.331-339 |
| issn | 0018-9529 1558-1721 |
| language | eng |
| recordid | cdi_ieee_primary_3764 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Circuit faults Degradation Electronics Error correction codes Exact sciences and technology Fault tolerance Fault tolerant systems Hardware Random access memory Redundancy Reliability Reliability engineering Very large scale integration |
| title | Schemes of dynamic redundancy for fault tolerance in random access memories |
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