Pixel processing in a memory controller

The SX-a programmable pixel processor implemented in a workstation memory controller chip-aims to perform as well as low-end 2D and 3D graphics processors and to surpass low-end imaging accelerators. The following features help accomplish this goal: large internal register set; vectorized RISC-like...

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Veröffentlicht in:	IEEE computer graphics and applications 1995-01, Vol.15 (1), p.51-61
Hauptverfasser:	Donovan, W., Sabella, P., Kabir, I., Hsieh, M.M.
Format:	Magazinearticle
Sprache:	eng
Schlagworte:	Applied sciences Artificial intelligence Clocks Computer science control theory systems Computer systems and distributed systems. User interface Costs Displays Exact sciences and technology Graphics Image processing Pattern recognition. Digital image processing. Computational geometry Pixel Random access memory Registers Rendering (computer graphics) Software Workstations
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