A VLSI priority packet queue with overwrite and inheritance

Priority-based flow-control is essential for dead-line based real-time applications. First-in-first-out queues introduce priority inversion, which can cause unbounded delays. Yet very few priority queue implementations exist. This paper presents a novel 1.2 /spl mu/m CMOS priority packet queue that...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Picker, D., Bendak, M.B., Fellman, R.D.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Clocks Computer architecture Delay Distributed computing Memory architecture Network interfaces Prototypes Robustness Throughput Very large scale integration
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