Implementing proper ASIC design margins: a must for reliable operation

This paper presents some of the basic timing related design parameters for digital ASICs (propagation delay, operating frequency) where sufficient margin must exist to preclude operational failures caused by performance degradation from such effects as: aging, nuclear radiation, voltage, temperature...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Willing, W.E., Helland, A.R.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Aging Application specific integrated circuits Degradation Digital circuits Frequency Propagation delay Reliability engineering Temperature Timing Voltage
Online-Zugang:	Volltext bestellen
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