A low-power generator-based FIFO using ring pointers and current-mode sensing
The authors present a submicron full CMOS FIFO (first in, first out) memory generator for ASIC (application-specific integrated circuit) and full-custom applications that combines asynchronous access, shift register pointers, a direct word line comparison technique (DWLC) for flag generation, and cu...
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creator | Fenstermaker, L.R. O'Conner, K.J. |
description | The authors present a submicron full CMOS FIFO (first in, first out) memory generator for ASIC (application-specific integrated circuit) and full-custom applications that combines asynchronous access, shift register pointers, a direct word line comparison technique (DWLC) for flag generation, and current sensing in a regular structured architecture that uses circuit compaction and automated parameteric characterization. It features overread and write protection and retransmit capability at clock rates of 70-100 MHz at 5 V and 40-60 MHz at 3.3 V. The regular structure yields predictable performance and simplifies timing model synthesis for simulators. Special hardware features support full fault coverage with BIST (built-in self-test) algorithms available in hardware or software.< > |
doi_str_mv | 10.1109/ISSCC.1993.280031 |
format | Conference Proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_280031</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>280031</ieee_id><sourcerecordid>280031</sourcerecordid><originalsourceid>FETCH-LOGICAL-i89t-fe9a6b4a410b4722bc579ea197e6b2e88815d2e68dacc09e13896831325fb9d3</originalsourceid><addsrcrecordid>eNotj8tqwzAURAWl0DbNB7Qr_YBcXckP3WUwTWtIyMLdB8m6Di6JbCSH0L9vQzqLOZvhwDD2AjIDkPjWtG1dZ4CoM2Wk1HDHnmRlpJZoKnhgy5S-5V_yQqLOH9l2xY_jRUzjhSI_UKBo5zEKZxN5vm7WO35OQzjweK1pHMJMMXEbPO_OMVKYxWn0xBOF6-yZ3ff2mGj5zwVr1-9f9afY7D6aerURg8FZ9IS2dLnNQbq8Usp1RYVkASsqnSJjDBReUWm87TqJBNpgaTRoVfQOvV6w15t1IKL9FIeTjT_72139C0LDS18</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A low-power generator-based FIFO using ring pointers and current-mode sensing</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Fenstermaker, L.R. ; O'Conner, K.J.</creator><creatorcontrib>Fenstermaker, L.R. ; O'Conner, K.J.</creatorcontrib><description>The authors present a submicron full CMOS FIFO (first in, first out) memory generator for ASIC (application-specific integrated circuit) and full-custom applications that combines asynchronous access, shift register pointers, a direct word line comparison technique (DWLC) for flag generation, and current sensing in a regular structured architecture that uses circuit compaction and automated parameteric characterization. It features overread and write protection and retransmit capability at clock rates of 70-100 MHz at 5 V and 40-60 MHz at 3.3 V. The regular structure yields predictable performance and simplifies timing model synthesis for simulators. Special hardware features support full fault coverage with BIST (built-in self-test) algorithms available in hardware or software.< ></description><identifier>ISBN: 0780309871</identifier><identifier>ISBN: 9780780309876</identifier><identifier>DOI: 10.1109/ISSCC.1993.280031</identifier><language>eng</language><publisher>IEEE</publisher><subject>Application specific integrated circuits ; Built-in self-test ; Character generation ; CMOS memory circuits ; Compaction ; DC generators ; Hardware ; Predictive models ; Protection ; Shift registers</subject><ispartof>1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 1993, p.242-243</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/280031$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/280031$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Fenstermaker, L.R.</creatorcontrib><creatorcontrib>O'Conner, K.J.</creatorcontrib><title>A low-power generator-based FIFO using ring pointers and current-mode sensing</title><title>1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers</title><addtitle>ISSCC</addtitle><description>The authors present a submicron full CMOS FIFO (first in, first out) memory generator for ASIC (application-specific integrated circuit) and full-custom applications that combines asynchronous access, shift register pointers, a direct word line comparison technique (DWLC) for flag generation, and current sensing in a regular structured architecture that uses circuit compaction and automated parameteric characterization. It features overread and write protection and retransmit capability at clock rates of 70-100 MHz at 5 V and 40-60 MHz at 3.3 V. The regular structure yields predictable performance and simplifies timing model synthesis for simulators. Special hardware features support full fault coverage with BIST (built-in self-test) algorithms available in hardware or software.< ></description><subject>Application specific integrated circuits</subject><subject>Built-in self-test</subject><subject>Character generation</subject><subject>CMOS memory circuits</subject><subject>Compaction</subject><subject>DC generators</subject><subject>Hardware</subject><subject>Predictive models</subject><subject>Protection</subject><subject>Shift registers</subject><isbn>0780309871</isbn><isbn>9780780309876</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1993</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tqwzAURAWl0DbNB7Qr_YBcXckP3WUwTWtIyMLdB8m6Di6JbCSH0L9vQzqLOZvhwDD2AjIDkPjWtG1dZ4CoM2Wk1HDHnmRlpJZoKnhgy5S-5V_yQqLOH9l2xY_jRUzjhSI_UKBo5zEKZxN5vm7WO35OQzjweK1pHMJMMXEbPO_OMVKYxWn0xBOF6-yZ3ff2mGj5zwVr1-9f9afY7D6aerURg8FZ9IS2dLnNQbq8Usp1RYVkASsqnSJjDBReUWm87TqJBNpgaTRoVfQOvV6w15t1IKL9FIeTjT_72139C0LDS18</recordid><startdate>1993</startdate><enddate>1993</enddate><creator>Fenstermaker, L.R.</creator><creator>O'Conner, K.J.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1993</creationdate><title>A low-power generator-based FIFO using ring pointers and current-mode sensing</title><author>Fenstermaker, L.R. ; O'Conner, K.J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i89t-fe9a6b4a410b4722bc579ea197e6b2e88815d2e68dacc09e13896831325fb9d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1993</creationdate><topic>Application specific integrated circuits</topic><topic>Built-in self-test</topic><topic>Character generation</topic><topic>CMOS memory circuits</topic><topic>Compaction</topic><topic>DC generators</topic><topic>Hardware</topic><topic>Predictive models</topic><topic>Protection</topic><topic>Shift registers</topic><toplevel>online_resources</toplevel><creatorcontrib>Fenstermaker, L.R.</creatorcontrib><creatorcontrib>O'Conner, K.J.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fenstermaker, L.R.</au><au>O'Conner, K.J.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A low-power generator-based FIFO using ring pointers and current-mode sensing</atitle><btitle>1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers</btitle><stitle>ISSCC</stitle><date>1993</date><risdate>1993</risdate><spage>242</spage><epage>243</epage><pages>242-243</pages><isbn>0780309871</isbn><isbn>9780780309876</isbn><abstract>The authors present a submicron full CMOS FIFO (first in, first out) memory generator for ASIC (application-specific integrated circuit) and full-custom applications that combines asynchronous access, shift register pointers, a direct word line comparison technique (DWLC) for flag generation, and current sensing in a regular structured architecture that uses circuit compaction and automated parameteric characterization. It features overread and write protection and retransmit capability at clock rates of 70-100 MHz at 5 V and 40-60 MHz at 3.3 V. The regular structure yields predictable performance and simplifies timing model synthesis for simulators. Special hardware features support full fault coverage with BIST (built-in self-test) algorithms available in hardware or software.< ></abstract><pub>IEEE</pub><doi>10.1109/ISSCC.1993.280031</doi><tpages>2</tpages></addata></record> |
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identifier | ISBN: 0780309871 |
ispartof | 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 1993, p.242-243 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Application specific integrated circuits Built-in self-test Character generation CMOS memory circuits Compaction DC generators Hardware Predictive models Protection Shift registers |
title | A low-power generator-based FIFO using ring pointers and current-mode sensing |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-11T23%3A06%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20low-power%20generator-based%20FIFO%20using%20ring%20pointers%20and%20current-mode%20sensing&rft.btitle=1993%20IEEE%20International%20Solid-State%20Circuits%20Conference%20Digest%20of%20Technical%20Papers&rft.au=Fenstermaker,%20L.R.&rft.date=1993&rft.spage=242&rft.epage=243&rft.pages=242-243&rft.isbn=0780309871&rft.isbn_list=9780780309876&rft_id=info:doi/10.1109/ISSCC.1993.280031&rft_dat=%3Cieee_6IE%3E280031%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=280031&rfr_iscdi=true |