A novel design for the construction and startup of an eight inch pilot line

An 8-in wafer line with 0.5- mu m CMOS process technology for DRAM and SRAM pilot production is discussed. The pilot line is expected to achieve: (1) speedy construction and startup with overall duration of 16 months; (2) a class-0.1 clean environment at 0.3- mu m particle testing level; (3) the fle...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Tseng, B.H.P., Cheng, C.-H., Chen, H.H., Lu, C.Y., Jensen, R.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	CMOS process CMOS technology Construction industry Consumer electronics Costs Isolation technology Manufacturing industries Random access memory Semiconductor device manufacture Space technology
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