BiCMOS process design for mixed-signal applications
Mixed-signal BiCMOS processes must provide for higher-voltage operation and diverse components to support a fragmented market. Most BiCMOS processes have evolved from an existing core 5V CMOS technology. The impact on process design of extending the voltage range and adding analog components is desc...
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creator | Scharf, B. |
description | Mixed-signal BiCMOS processes must provide for higher-voltage operation and diverse components to support a fragmented market. Most BiCMOS processes have evolved from an existing core 5V CMOS technology. The impact on process design of extending the voltage range and adding analog components is described. The ABCMOS-2 process, whose device cross-sections are shown, is used to illustrate the effects. Its major performance parameters are summarized, and components and future trends are considered.< > |
doi_str_mv | 10.1109/ISCAS.1992.230667 |
format | Conference Proceeding |
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Most BiCMOS processes have evolved from an existing core 5V CMOS technology. The impact on process design of extending the voltage range and adding analog components is described. The ABCMOS-2 process, whose device cross-sections are shown, is used to illustrate the effects. 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Most BiCMOS processes have evolved from an existing core 5V CMOS technology. The impact on process design of extending the voltage range and adding analog components is described. The ABCMOS-2 process, whose device cross-sections are shown, is used to illustrate the effects. Its major performance parameters are summarized, and components and future trends are considered.< ></description><subject>BiCMOS integrated circuits</subject><subject>CMOS logic circuits</subject><subject>CMOS process</subject><subject>CMOS technology</subject><subject>Isolation technology</subject><subject>MOS capacitors</subject><subject>MOSFETs</subject><subject>Process design</subject><subject>Signal to noise ratio</subject><subject>Voltage</subject><isbn>9780780305939</isbn><isbn>0780305930</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1992</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tqwzAURAWl0JL6A9qVfsDuvXrY0jI1fQQSsnC7DrJ0VVSc2FhZtH9fl3Q4MJzNwDB2j1Ahgn3cdO26q9BaUQkJdd1cscI2BhYkaCvtDSty_oIlSoMV8pbJp9Tu9h2f5tFTzjxQTp8nHseZH9M3hfJP3cDdNA3Ju3MaT_mOXUc3ZCr-e8U-Xp7f27dyu3_dtOttmbBR5xKVM9JGj14RCaqV8EH1vY-hNwTK9tpH36BTJhBoisZZNKCixjoQUS9X7OGymxY9THM6uvnncHkmfwFIZkSa</recordid><startdate>1992</startdate><enddate>1992</enddate><creator>Scharf, B.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1992</creationdate><title>BiCMOS process design for mixed-signal applications</title><author>Scharf, B.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i174t-14a839fc1c4ee2e642cd4bbcfdb8e049b5cfc71a48de05ef8a91804f516deeeb3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1992</creationdate><topic>BiCMOS integrated circuits</topic><topic>CMOS logic circuits</topic><topic>CMOS process</topic><topic>CMOS technology</topic><topic>Isolation technology</topic><topic>MOS capacitors</topic><topic>MOSFETs</topic><topic>Process design</topic><topic>Signal to noise ratio</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Scharf, B.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Scharf, B.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>BiCMOS process design for mixed-signal applications</atitle><btitle>1992 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>1992</date><risdate>1992</risdate><volume>6</volume><spage>2683</spage><epage>2686 vol.6</epage><pages>2683-2686 vol.6</pages><isbn>9780780305939</isbn><isbn>0780305930</isbn><abstract>Mixed-signal BiCMOS processes must provide for higher-voltage operation and diverse components to support a fragmented market. Most BiCMOS processes have evolved from an existing core 5V CMOS technology. The impact on process design of extending the voltage range and adding analog components is described. The ABCMOS-2 process, whose device cross-sections are shown, is used to illustrate the effects. Its major performance parameters are summarized, and components and future trends are considered.< ></abstract><pub>IEEE</pub><doi>10.1109/ISCAS.1992.230667</doi></addata></record> |
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identifier | ISBN: 9780780305939 |
ispartof | 1992 IEEE International Symposium on Circuits and Systems (ISCAS), 1992, Vol.6, p.2683-2686 vol.6 |
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language | eng |
recordid | cdi_ieee_primary_230667 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | BiCMOS integrated circuits CMOS logic circuits CMOS process CMOS technology Isolation technology MOS capacitors MOSFETs Process design Signal to noise ratio Voltage |
title | BiCMOS process design for mixed-signal applications |
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