Ping-pong supervisor for synchronous links

Describes the framework and the design method used for an integrated circuit achieving ping-pong control for digital synchronous links. The principles of time division duplex communications and the different choices required for circuit design are also explained.< >

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Hauptverfasser:	Adde, P., Jezequel, M.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuit synthesis Communication system control Computer Science Design methodology Digital communication Digital control Frequency Hardware Architecture Telephony Time division multiplexing Transceivers VHF circuits
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creator	Adde, P. Jezequel, M.
description	Describes the framework and the design method used for an integrated circuit achieving ping-pong control for digital synchronous links. The principles of time division duplex communications and the different choices required for circuit design are also explained.< >
doi_str_mv	10.1109/EUASIC.1992.228000
format	Conference Proceeding
fullrecord	<record><control><sourceid>hal_6IE</sourceid><recordid>TN_cdi_ieee_primary_228000</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>228000</ieee_id><sourcerecordid>oai_HAL_hal_02076559v1</sourcerecordid><originalsourceid>FETCH-LOGICAL-h121t-b82b41a4b4e0fc578f579a0d4801886c7fe50d9c383a7cc6be501ae669ba68b43</originalsourceid><addsrcrecordid>eNo9j9FLwzAYxAMiqHP_wJ76qtD6JU3SL4-lTDcoKOieS5Kla7S2pXGD_fd2VHw4jjt-HBwhKwoJpaCe1rv8fVskVCmWMIYAcEXuAClKhlzIG7IM4XNqQQhkStySxzffHeKh7w5ROA5uPPnQj1E9KZw724x91x9D1PruK9yT61q3wS3_fEF2z-uPYhOXry_bIi_jhjL6ExtkhlPNDXdQW5FhLTKlYc8RKKK0We0E7JVNMdWZtdJMkWonpTJaouHpgjzMu41uq2H033o8V7321SYvq0sHDDIphDrRiV3NrHfO_cPz8_QXuVJN7w</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Ping-pong supervisor for synchronous links</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Adde, P. ; Jezequel, M.</creator><creatorcontrib>Adde, P. ; Jezequel, M.</creatorcontrib><description>Describes the framework and the design method used for an integrated circuit achieving ping-pong control for digital synchronous links. The principles of time division duplex communications and the different choices required for circuit design are also explained.< ></description><identifier>ISBN: 0818628456</identifier><identifier>ISBN: 9780818628450</identifier><identifier>DOI: 10.1109/EUASIC.1992.228000</identifier><language>eng</language><publisher>IEEE Comput. Soc. Press</publisher><subject>Circuit synthesis ; Communication system control ; Computer Science ; Design methodology ; Digital communication ; Digital control ; Frequency ; Hardware Architecture ; Telephony ; Time division multiplexing ; Transceivers ; VHF circuits</subject><ispartof>Proceedings Euro ASIC '92, 1992, p.364-367</ispartof><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/228000$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,885,2056,4047,4048,27923,54918</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/228000$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttps://hal.science/hal-02076559$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Adde, P.</creatorcontrib><creatorcontrib>Jezequel, M.</creatorcontrib><title>Ping-pong supervisor for synchronous links</title><title>Proceedings Euro ASIC '92</title><addtitle>EUASIC</addtitle><description>Describes the framework and the design method used for an integrated circuit achieving ping-pong control for digital synchronous links. The principles of time division duplex communications and the different choices required for circuit design are also explained.< ></description><subject>Circuit synthesis</subject><subject>Communication system control</subject><subject>Computer Science</subject><subject>Design methodology</subject><subject>Digital communication</subject><subject>Digital control</subject><subject>Frequency</subject><subject>Hardware Architecture</subject><subject>Telephony</subject><subject>Time division multiplexing</subject><subject>Transceivers</subject><subject>VHF circuits</subject><isbn>0818628456</isbn><isbn>9780818628450</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1992</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo9j9FLwzAYxAMiqHP_wJ76qtD6JU3SL4-lTDcoKOieS5Kla7S2pXGD_fd2VHw4jjt-HBwhKwoJpaCe1rv8fVskVCmWMIYAcEXuAClKhlzIG7IM4XNqQQhkStySxzffHeKh7w5ROA5uPPnQj1E9KZw724x91x9D1PruK9yT61q3wS3_fEF2z-uPYhOXry_bIi_jhjL6ExtkhlPNDXdQW5FhLTKlYc8RKKK0We0E7JVNMdWZtdJMkWonpTJaouHpgjzMu41uq2H033o8V7321SYvq0sHDDIphDrRiV3NrHfO_cPz8_QXuVJN7w</recordid><startdate>1992</startdate><enddate>1992</enddate><creator>Adde, P.</creator><creator>Jezequel, M.</creator><general>IEEE Comput. Soc. Press</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope><scope>1XC</scope></search><sort><creationdate>1992</creationdate><title>Ping-pong supervisor for synchronous links</title><author>Adde, P. ; Jezequel, M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-h121t-b82b41a4b4e0fc578f579a0d4801886c7fe50d9c383a7cc6be501ae669ba68b43</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Circuit synthesis</topic><topic>Communication system control</topic><topic>Computer Science</topic><topic>Design methodology</topic><topic>Digital communication</topic><topic>Digital control</topic><topic>Frequency</topic><topic>Hardware Architecture</topic><topic>Telephony</topic><topic>Time division multiplexing</topic><topic>Transceivers</topic><topic>VHF circuits</topic><toplevel>online_resources</toplevel><creatorcontrib>Adde, P.</creatorcontrib><creatorcontrib>Jezequel, M.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection><collection>Hyper Article en Ligne (HAL)</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Adde, P.</au><au>Jezequel, M.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Ping-pong supervisor for synchronous links</atitle><btitle>Proceedings Euro ASIC '92</btitle><stitle>EUASIC</stitle><date>1992</date><risdate>1992</risdate><spage>364</spage><epage>367</epage><pages>364-367</pages><isbn>0818628456</isbn><isbn>9780818628450</isbn><abstract>Describes the framework and the design method used for an integrated circuit achieving ping-pong control for digital synchronous links. The principles of time division duplex communications and the different choices required for circuit design are also explained.< ></abstract><pub>IEEE Comput. Soc. Press</pub><doi>10.1109/EUASIC.1992.228000</doi><tpages>4</tpages></addata></record>
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identifier	ISBN: 0818628456
ispartof	Proceedings Euro ASIC '92, 1992, p.364-367
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language	eng
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source	IEEE Electronic Library (IEL) Conference Proceedings
subjects	Circuit synthesis Communication system control Computer Science Design methodology Digital communication Digital control Frequency Hardware Architecture Telephony Time division multiplexing Transceivers VHF circuits
title	Ping-pong supervisor for synchronous links
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T02%3A38%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-hal_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Ping-pong%20supervisor%20for%20synchronous%20links&rft.btitle=Proceedings%20Euro%20ASIC%20'92&rft.au=Adde,%20P.&rft.date=1992&rft.spage=364&rft.epage=367&rft.pages=364-367&rft.isbn=0818628456&rft.isbn_list=9780818628450&rft_id=info:doi/10.1109/EUASIC.1992.228000&rft_dat=%3Chal_6IE%3Eoai_HAL_hal_02076559v1%3C/hal_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=228000&rfr_iscdi=true