Petri net modelling in embedded system design
A very high-speed integrated circuit hardware description language (VHDL)-based language for high-level synthesis was used for task-level embedded systems specification. The language has constructs for message passing, mutual data protection, concurrency, and synchronization. The system specificatio...
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| creator | Benders, L.P.M. Stevens, M.P.J. |
| description | A very high-speed integrated circuit hardware description language (VHDL)-based language for high-level synthesis was used for task-level embedded systems specification. The language has constructs for message passing, mutual data protection, concurrency, and synchronization. The system specification was modeled with colored Petri nets, allowing concurrency visualization, deadlock detection, starvation detection, protocol requirements analysis, and potential resource sharing identification. The data transformation was modeled by using coloring functions. The specification language, the colored Petri nets, the nets modeling the concurrency, and the translation of the specification to the nets are discussed.< > |
| doi_str_mv | 10.1109/CMPEUR.1992.218464 |
| format | Conference Proceeding |
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The language has constructs for message passing, mutual data protection, concurrency, and synchronization. The system specification was modeled with colored Petri nets, allowing concurrency visualization, deadlock detection, starvation detection, protocol requirements analysis, and potential resource sharing identification. The data transformation was modeled by using coloring functions. The specification language, the colored Petri nets, the nets modeling the concurrency, and the translation of the specification to the nets are discussed.< ></description><identifier>ISBN: 9780818627606</identifier><identifier>ISBN: 0818627603</identifier><identifier>DOI: 10.1109/CMPEUR.1992.218464</identifier><language>eng</language><publisher>IEEE Comput. Soc. Press</publisher><subject>Concurrent computing ; Data visualization ; Embedded system ; Hardware design languages ; High level synthesis ; High speed integrated circuits ; Message passing ; Petri nets ; Protection ; System recovery</subject><ispartof>CompEuro 1992 Proceedings Computer Systems and Software Engineering, 1992, p.612-617</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/218464$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,4048,4049,27924,54919</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/218464$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Benders, L.P.M.</creatorcontrib><creatorcontrib>Stevens, M.P.J.</creatorcontrib><title>Petri net modelling in embedded system design</title><title>CompEuro 1992 Proceedings Computer Systems and Software Engineering</title><addtitle>CMPEUR</addtitle><description>A very high-speed integrated circuit hardware description language (VHDL)-based language for high-level synthesis was used for task-level embedded systems specification. The language has constructs for message passing, mutual data protection, concurrency, and synchronization. The system specification was modeled with colored Petri nets, allowing concurrency visualization, deadlock detection, starvation detection, protocol requirements analysis, and potential resource sharing identification. The data transformation was modeled by using coloring functions. The specification language, the colored Petri nets, the nets modeling the concurrency, and the translation of the specification to the nets are discussed.< ></description><subject>Concurrent computing</subject><subject>Data visualization</subject><subject>Embedded system</subject><subject>Hardware design languages</subject><subject>High level synthesis</subject><subject>High speed integrated circuits</subject><subject>Message passing</subject><subject>Petri nets</subject><subject>Protection</subject><subject>System recovery</subject><isbn>9780818627606</isbn><isbn>0818627603</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1992</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotj8tqwzAURAWl0JL6B7LSD9jVlSzpallM-oCEhpKugxRdBQXbLZY3-fsa0lnM2c1hGFuDaACEe-52-833VwPOyUYCtqa9Y5WzKBDQSGuEeWBVKRexpNXgUD-yek_zlPlIMx9-IvV9Hs88j5yGQDFS5OVaZhp4pJLP4xO7T74vVP1zxQ6vm0P3Xm8_3z66l22d0c21UQlBS6N1Coi2dRZUskGeQgQwHkRUSCJpsiqij9LbpcMikwKdlKBWbH2bzUR0_J3y4Kfr8XZJ_QE1yED9</recordid><startdate>1992</startdate><enddate>1992</enddate><creator>Benders, L.P.M.</creator><creator>Stevens, M.P.J.</creator><general>IEEE Comput. Soc. Press</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1992</creationdate><title>Petri net modelling in embedded system design</title><author>Benders, L.P.M. ; Stevens, M.P.J.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i89t-63f8152655fb88749713f7b2cbd116a10d38e0f5e73d8ad2a78adbded20892213</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Concurrent computing</topic><topic>Data visualization</topic><topic>Embedded system</topic><topic>Hardware design languages</topic><topic>High level synthesis</topic><topic>High speed integrated circuits</topic><topic>Message passing</topic><topic>Petri nets</topic><topic>Protection</topic><topic>System recovery</topic><toplevel>online_resources</toplevel><creatorcontrib>Benders, L.P.M.</creatorcontrib><creatorcontrib>Stevens, M.P.J.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Benders, L.P.M.</au><au>Stevens, M.P.J.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Petri net modelling in embedded system design</atitle><btitle>CompEuro 1992 Proceedings Computer Systems and Software Engineering</btitle><stitle>CMPEUR</stitle><date>1992</date><risdate>1992</risdate><spage>612</spage><epage>617</epage><pages>612-617</pages><isbn>9780818627606</isbn><isbn>0818627603</isbn><abstract>A very high-speed integrated circuit hardware description language (VHDL)-based language for high-level synthesis was used for task-level embedded systems specification. The language has constructs for message passing, mutual data protection, concurrency, and synchronization. The system specification was modeled with colored Petri nets, allowing concurrency visualization, deadlock detection, starvation detection, protocol requirements analysis, and potential resource sharing identification. The data transformation was modeled by using coloring functions. The specification language, the colored Petri nets, the nets modeling the concurrency, and the translation of the specification to the nets are discussed.< ></abstract><pub>IEEE Comput. Soc. Press</pub><doi>10.1109/CMPEUR.1992.218464</doi><tpages>6</tpages></addata></record> |
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| identifier | ISBN: 9780818627606 |
| ispartof | CompEuro 1992 Proceedings Computer Systems and Software Engineering, 1992, p.612-617 |
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| language | eng |
| recordid | cdi_ieee_primary_218464 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Concurrent computing Data visualization Embedded system Hardware design languages High level synthesis High speed integrated circuits Message passing Petri nets Protection System recovery |
| title | Petri net modelling in embedded system design |
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