Binary input/ternary output switching circuits designed via the sign transformation
Using the recently developed sign transformation as a design tool, a method for designing binary input/ternary output circuits is presented. It is shown how to combine sign coefficients into sign domain cubes in order to simplify the hardware structure. The implementation is based on a complete basi...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 354 |
|---|---|
| container_issue | |
| container_start_page | 348 |
| container_title | |
| container_volume | |
| creator | Besslich, P.W. Trachtenberg, E.A. |
| description | Using the recently developed sign transformation as a design tool, a method for designing binary input/ternary output circuits is presented. It is shown how to combine sign coefficients into sign domain cubes in order to simplify the hardware structure. The implementation is based on a complete basis for all Boolean functions taking the values +1 and -1 for true and false values, respectively, and the value zero for unspecified conditions. Hardware realization requires some special devices. However, using present-day logic cell arrays, certain applications are possible.< > |
| doi_str_mv | 10.1109/ISMVL.1992.186816 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>proquest_6IE</sourceid><recordid>TN_cdi_ieee_primary_186816</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>186816</ieee_id><sourcerecordid>25548999</sourcerecordid><originalsourceid>FETCH-LOGICAL-i203t-dec72091ca4ab3c0c0fbbb3a5d402a0e426c3726d0741c6401345e65d7318723</originalsourceid><addsrcrecordid>eNotkE1LAzEQhgMiqLU_QE85eWs7-dzNUYvWwoqHFq9LNjttI222JlnFf-9qfS_zPvAwMEPIDYMpY2Bmy9XLWzVlxvApK3XJ9Bm5gnKoXJfALsg4pXcYIqVSrLgkqwcfbPymPhz7PMsY_6jr84A0ffnsdj5sqfPR9T4n2mLy24At_fSW5h3SX6Q52pA2XTzY7LtwTc43dp9w_D9HZP30uJ4_T6rXxXJ-X008B5EnLbqCg2HOStsIBw42TdMIq1oJ3AJKrp0ouG6hkMxpCUxIhVq1hWBlwcWI3J3WHmP30WPK9cEnh_u9Ddj1qeZKydIYM4i3J9EjYn2M_jDcWJ_eI34A0iFcfw</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype><pqid>25548999</pqid></control><display><type>conference_proceeding</type><title>Binary input/ternary output switching circuits designed via the sign transformation</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Besslich, P.W. ; Trachtenberg, E.A.</creator><creatorcontrib>Besslich, P.W. ; Trachtenberg, E.A.</creatorcontrib><description>Using the recently developed sign transformation as a design tool, a method for designing binary input/ternary output circuits is presented. It is shown how to combine sign coefficients into sign domain cubes in order to simplify the hardware structure. The implementation is based on a complete basis for all Boolean functions taking the values +1 and -1 for true and false values, respectively, and the value zero for unspecified conditions. Hardware realization requires some special devices. However, using present-day logic cell arrays, certain applications are possible.< ></description><identifier>ISBN: 0818626801</identifier><identifier>ISBN: 9780818626807</identifier><identifier>DOI: 10.1109/ISMVL.1992.186816</identifier><language>eng</language><publisher>IEEE Comput. Soc. Press</publisher><subject>Arithmetic ; Boolean functions ; Design methodology ; Fasteners ; Hardware ; Logic arrays ; Logic design ; Logic devices ; Multivalued logic ; Switching circuits</subject><ispartof>Multiple-Valued Logic, 22nd Symposium (ISMVL '92), 1992, p.348-354</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/186816$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,776,780,785,786,2052,27901,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/186816$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Besslich, P.W.</creatorcontrib><creatorcontrib>Trachtenberg, E.A.</creatorcontrib><title>Binary input/ternary output switching circuits designed via the sign transformation</title><title>Multiple-Valued Logic, 22nd Symposium (ISMVL '92)</title><addtitle>ISMVL</addtitle><description>Using the recently developed sign transformation as a design tool, a method for designing binary input/ternary output circuits is presented. It is shown how to combine sign coefficients into sign domain cubes in order to simplify the hardware structure. The implementation is based on a complete basis for all Boolean functions taking the values +1 and -1 for true and false values, respectively, and the value zero for unspecified conditions. Hardware realization requires some special devices. However, using present-day logic cell arrays, certain applications are possible.< ></description><subject>Arithmetic</subject><subject>Boolean functions</subject><subject>Design methodology</subject><subject>Fasteners</subject><subject>Hardware</subject><subject>Logic arrays</subject><subject>Logic design</subject><subject>Logic devices</subject><subject>Multivalued logic</subject><subject>Switching circuits</subject><isbn>0818626801</isbn><isbn>9780818626807</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1992</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotkE1LAzEQhgMiqLU_QE85eWs7-dzNUYvWwoqHFq9LNjttI222JlnFf-9qfS_zPvAwMEPIDYMpY2Bmy9XLWzVlxvApK3XJ9Bm5gnKoXJfALsg4pXcYIqVSrLgkqwcfbPymPhz7PMsY_6jr84A0ffnsdj5sqfPR9T4n2mLy24At_fSW5h3SX6Q52pA2XTzY7LtwTc43dp9w_D9HZP30uJ4_T6rXxXJ-X008B5EnLbqCg2HOStsIBw42TdMIq1oJ3AJKrp0ouG6hkMxpCUxIhVq1hWBlwcWI3J3WHmP30WPK9cEnh_u9Ddj1qeZKydIYM4i3J9EjYn2M_jDcWJ_eI34A0iFcfw</recordid><startdate>19920101</startdate><enddate>19920101</enddate><creator>Besslich, P.W.</creator><creator>Trachtenberg, E.A.</creator><general>IEEE Comput. Soc. Press</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope><scope>7SC</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>19920101</creationdate><title>Binary input/ternary output switching circuits designed via the sign transformation</title><author>Besslich, P.W. ; Trachtenberg, E.A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i203t-dec72091ca4ab3c0c0fbbb3a5d402a0e426c3726d0741c6401345e65d7318723</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Arithmetic</topic><topic>Boolean functions</topic><topic>Design methodology</topic><topic>Fasteners</topic><topic>Hardware</topic><topic>Logic arrays</topic><topic>Logic design</topic><topic>Logic devices</topic><topic>Multivalued logic</topic><topic>Switching circuits</topic><toplevel>online_resources</toplevel><creatorcontrib>Besslich, P.W.</creatorcontrib><creatorcontrib>Trachtenberg, E.A.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Besslich, P.W.</au><au>Trachtenberg, E.A.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Binary input/ternary output switching circuits designed via the sign transformation</atitle><btitle>Multiple-Valued Logic, 22nd Symposium (ISMVL '92)</btitle><stitle>ISMVL</stitle><date>1992-01-01</date><risdate>1992</risdate><spage>348</spage><epage>354</epage><pages>348-354</pages><isbn>0818626801</isbn><isbn>9780818626807</isbn><abstract>Using the recently developed sign transformation as a design tool, a method for designing binary input/ternary output circuits is presented. It is shown how to combine sign coefficients into sign domain cubes in order to simplify the hardware structure. The implementation is based on a complete basis for all Boolean functions taking the values +1 and -1 for true and false values, respectively, and the value zero for unspecified conditions. Hardware realization requires some special devices. However, using present-day logic cell arrays, certain applications are possible.< ></abstract><pub>IEEE Comput. Soc. Press</pub><doi>10.1109/ISMVL.1992.186816</doi><tpages>7</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISBN: 0818626801 |
| ispartof | Multiple-Valued Logic, 22nd Symposium (ISMVL '92), 1992, p.348-354 |
| issn | |
| language | eng |
| recordid | cdi_ieee_primary_186816 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Arithmetic Boolean functions Design methodology Fasteners Hardware Logic arrays Logic design Logic devices Multivalued logic Switching circuits |
| title | Binary input/ternary output switching circuits designed via the sign transformation |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-12T22%3A11%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Binary%20input/ternary%20output%20switching%20circuits%20designed%20via%20the%20sign%20transformation&rft.btitle=Multiple-Valued%20Logic,%2022nd%20Symposium%20(ISMVL%20'92)&rft.au=Besslich,%20P.W.&rft.date=1992-01-01&rft.spage=348&rft.epage=354&rft.pages=348-354&rft.isbn=0818626801&rft.isbn_list=9780818626807&rft_id=info:doi/10.1109/ISMVL.1992.186816&rft_dat=%3Cproquest_6IE%3E25548999%3C/proquest_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=25548999&rft_id=info:pmid/&rft_ieee_id=186816&rfr_iscdi=true |