A one-transistor synapse circuit with an analog LMS adaptive feedback for neural network VLSI
A one-transistor (1T) synapse circuit which uses a single MOS transistor and is more efficient for VLSI implementation of adaptive neural networks than other synapse circuits is presented. This 1T synapse circuit can be used to implement multiply/divide/sum circuits for realizing an adaptive neural...
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creator | Lu, T.C. Chiang, M.L. Kuo, J.B. |
description | A one-transistor (1T) synapse circuit which uses a single MOS transistor and is more efficient for VLSI implementation of adaptive neural networks than other synapse circuits is presented. This 1T synapse circuit can be used to implement multiply/divide/sum circuits for realizing an adaptive neural network. The feasibility of using this circuit in adaptive neural networks is demonstrated by a 4-b analog-to-digital converter circuit based on the Hopfield modified neural network model with an analog LMS adaptive feedback. DC and transient study shows that the 1T synapse circuits with an analog adaptive feedback circuit can be more efficiently used for VLSI implementation of adaptive neural networks.< > |
doi_str_mv | 10.1109/ISCAS.1991.176610 |
format | Conference Proceeding |
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This 1T synapse circuit can be used to implement multiply/divide/sum circuits for realizing an adaptive neural network. The feasibility of using this circuit in adaptive neural networks is demonstrated by a 4-b analog-to-digital converter circuit based on the Hopfield modified neural network model with an analog LMS adaptive feedback. DC and transient study shows that the 1T synapse circuits with an analog adaptive feedback circuit can be more efficiently used for VLSI implementation of adaptive neural networks.< ></description><identifier>ISBN: 9780780300507</identifier><identifier>ISBN: 0780300505</identifier><identifier>DOI: 10.1109/ISCAS.1991.176610</identifier><language>eng</language><publisher>IEEE</publisher><subject>Adaptive systems ; Feedback circuits ; Hopfield neural networks ; Least squares approximation ; Linearity ; Neural networks ; Neurofeedback ; Neurons ; Resistors ; Very large scale integration</subject><ispartof>1991 IEEE International Symposium on Circuits and Systems (ISCAS), 1991, p.1303-1306 vol.3</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/176610$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/176610$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lu, T.C.</creatorcontrib><creatorcontrib>Chiang, M.L.</creatorcontrib><creatorcontrib>Kuo, J.B.</creatorcontrib><title>A one-transistor synapse circuit with an analog LMS adaptive feedback for neural network VLSI</title><title>1991 IEEE International Symposium on Circuits and Systems (ISCAS)</title><addtitle>ISCAS</addtitle><description>A one-transistor (1T) synapse circuit which uses a single MOS transistor and is more efficient for VLSI implementation of adaptive neural networks than other synapse circuits is presented. This 1T synapse circuit can be used to implement multiply/divide/sum circuits for realizing an adaptive neural network. The feasibility of using this circuit in adaptive neural networks is demonstrated by a 4-b analog-to-digital converter circuit based on the Hopfield modified neural network model with an analog LMS adaptive feedback. DC and transient study shows that the 1T synapse circuits with an analog adaptive feedback circuit can be more efficiently used for VLSI implementation of adaptive neural networks.< ></description><subject>Adaptive systems</subject><subject>Feedback circuits</subject><subject>Hopfield neural networks</subject><subject>Least squares approximation</subject><subject>Linearity</subject><subject>Neural networks</subject><subject>Neurofeedback</subject><subject>Neurons</subject><subject>Resistors</subject><subject>Very large scale integration</subject><isbn>9780780300507</isbn><isbn>0780300505</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1991</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNp9js1qwkAUhQeKYNE8QF3dFzDe8SdxlhIqCnaV0p3IbbzRMekkzEwU394BXffwwbc4HDhCfEiMpUQ12ebZKo-lUjKWaZJIfBORSpcYmCEuMO2LyLkLhswXqKbzd7FfQWN47C0Zp51vLLi7odYxFNoWnfZw0_4MZAJUNyfYfeVAR2q9vjKUzMdfKioow9BwZ6kO8rfGVvCzy7dD0Supdhy9PBCj9ed3thlrZj60Vv-RvR-eX2f_lg9qk0M6</recordid><startdate>1991</startdate><enddate>1991</enddate><creator>Lu, T.C.</creator><creator>Chiang, M.L.</creator><creator>Kuo, J.B.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1991</creationdate><title>A one-transistor synapse circuit with an analog LMS adaptive feedback for neural network VLSI</title><author>Lu, T.C. ; Chiang, M.L. ; Kuo, J.B.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_1766103</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1991</creationdate><topic>Adaptive systems</topic><topic>Feedback circuits</topic><topic>Hopfield neural networks</topic><topic>Least squares approximation</topic><topic>Linearity</topic><topic>Neural networks</topic><topic>Neurofeedback</topic><topic>Neurons</topic><topic>Resistors</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Lu, T.C.</creatorcontrib><creatorcontrib>Chiang, M.L.</creatorcontrib><creatorcontrib>Kuo, J.B.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lu, T.C.</au><au>Chiang, M.L.</au><au>Kuo, J.B.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A one-transistor synapse circuit with an analog LMS adaptive feedback for neural network VLSI</atitle><btitle>1991 IEEE International Symposium on Circuits and Systems (ISCAS)</btitle><stitle>ISCAS</stitle><date>1991</date><risdate>1991</risdate><spage>1303</spage><epage>1306 vol.3</epage><pages>1303-1306 vol.3</pages><isbn>9780780300507</isbn><isbn>0780300505</isbn><abstract>A one-transistor (1T) synapse circuit which uses a single MOS transistor and is more efficient for VLSI implementation of adaptive neural networks than other synapse circuits is presented. This 1T synapse circuit can be used to implement multiply/divide/sum circuits for realizing an adaptive neural network. The feasibility of using this circuit in adaptive neural networks is demonstrated by a 4-b analog-to-digital converter circuit based on the Hopfield modified neural network model with an analog LMS adaptive feedback. DC and transient study shows that the 1T synapse circuits with an analog adaptive feedback circuit can be more efficiently used for VLSI implementation of adaptive neural networks.< ></abstract><pub>IEEE</pub><doi>10.1109/ISCAS.1991.176610</doi></addata></record> |
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identifier | ISBN: 9780780300507 |
ispartof | 1991 IEEE International Symposium on Circuits and Systems (ISCAS), 1991, p.1303-1306 vol.3 |
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language | eng |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Adaptive systems Feedback circuits Hopfield neural networks Least squares approximation Linearity Neural networks Neurofeedback Neurons Resistors Very large scale integration |
title | A one-transistor synapse circuit with an analog LMS adaptive feedback for neural network VLSI |
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