FPGA based dead-time compensation for PWM inverters

Dead-times of power switches causes significant errors in some electric drive applications. Compensation of the error can be done with a small amount of discrete components and small programmable logic circuit. Larger field programmable gate array (FPGA) circuit allows integration of the modulator a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Rauma, K., Laakkonen, O., Ikonen, M., Silventoinen, P., Pyrhonen, O.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page P.7
container_issue
container_start_page 7 pp.
container_title
container_volume
creator Rauma, K.
Laakkonen, O.
Ikonen, M.
Silventoinen, P.
Pyrhonen, O.
description Dead-times of power switches causes significant errors in some electric drive applications. Compensation of the error can be done with a small amount of discrete components and small programmable logic circuit. Larger field programmable gate array (FPGA) circuit allows integration of the modulator and compensation logic in the same circuit resulting a very compact and cheap solution. This paper presents one solution to implement a dead-time compensation logic with a cheap and exact voltage feedback and a simple logic that can be implemented in a FPGA or application specific integrated circuits (ASIC). Full test system and measurement results are presented
doi_str_mv 10.1109/EPE.2005.219394
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1665584</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1665584</ieee_id><sourcerecordid>1665584</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-aa56372b77069b2e10ebb1f68759224da94a6c72ae59538288c3f6e7715f45333</originalsourceid><addsrcrecordid>eNotzD1rwzAQAFBBKaSknjtk0R-we_o4STeG4KSFlHoIdAyyfQaV2g6WKfTfd2intz0hnhRUSgE9101daQCstCJD9k4U5AOBx6AQSG9EkfMnAChy3gT3IMyxOe1lGzP3sufYl2saWXbzeOMpxzXNkxzmRTYfbzJN37ysvORHcT_Er8zFv1txOdaXw0t5fj-9HvbnMhGsZYzojNet9-Co1ayA21YNLngkrW0fyUbXeR0ZCU3QIXRmcOy9wsGiMWYrdn9tYubrbUljXH6uyjnEYM0v4IlBHw</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>FPGA based dead-time compensation for PWM inverters</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Rauma, K. ; Laakkonen, O. ; Ikonen, M. ; Silventoinen, P. ; Pyrhonen, O.</creator><creatorcontrib>Rauma, K. ; Laakkonen, O. ; Ikonen, M. ; Silventoinen, P. ; Pyrhonen, O.</creatorcontrib><description>Dead-times of power switches causes significant errors in some electric drive applications. Compensation of the error can be done with a small amount of discrete components and small programmable logic circuit. Larger field programmable gate array (FPGA) circuit allows integration of the modulator and compensation logic in the same circuit resulting a very compact and cheap solution. This paper presents one solution to implement a dead-time compensation logic with a cheap and exact voltage feedback and a simple logic that can be implemented in a FPGA or application specific integrated circuits (ASIC). Full test system and measurement results are presented</description><identifier>ISBN: 9789075815092</identifier><identifier>ISBN: 9075815093</identifier><identifier>DOI: 10.1109/EPE.2005.219394</identifier><language>eng</language><publisher>IEEE</publisher><subject>Application specific integrated circuits ; Circuit testing ; Converter control ; Field programmable gate arrays ; Industrial applications ; Integrated circuit measurements ; Intelligent drive ; Logic circuits ; Measurement ; Modulation coding ; Modulation Strategy ; Programmable logic arrays ; Pulse width modulation inverters ; System testing ; Voltage</subject><ispartof>2005 European Conference on Power Electronics and Applications, 2005, p.7 pp.-P.7</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1665584$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,777,781,786,787,2052,4036,4037,27906,54901</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1665584$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Rauma, K.</creatorcontrib><creatorcontrib>Laakkonen, O.</creatorcontrib><creatorcontrib>Ikonen, M.</creatorcontrib><creatorcontrib>Silventoinen, P.</creatorcontrib><creatorcontrib>Pyrhonen, O.</creatorcontrib><title>FPGA based dead-time compensation for PWM inverters</title><title>2005 European Conference on Power Electronics and Applications</title><addtitle>EPE</addtitle><description>Dead-times of power switches causes significant errors in some electric drive applications. Compensation of the error can be done with a small amount of discrete components and small programmable logic circuit. Larger field programmable gate array (FPGA) circuit allows integration of the modulator and compensation logic in the same circuit resulting a very compact and cheap solution. This paper presents one solution to implement a dead-time compensation logic with a cheap and exact voltage feedback and a simple logic that can be implemented in a FPGA or application specific integrated circuits (ASIC). Full test system and measurement results are presented</description><subject>Application specific integrated circuits</subject><subject>Circuit testing</subject><subject>Converter control</subject><subject>Field programmable gate arrays</subject><subject>Industrial applications</subject><subject>Integrated circuit measurements</subject><subject>Intelligent drive</subject><subject>Logic circuits</subject><subject>Measurement</subject><subject>Modulation coding</subject><subject>Modulation Strategy</subject><subject>Programmable logic arrays</subject><subject>Pulse width modulation inverters</subject><subject>System testing</subject><subject>Voltage</subject><isbn>9789075815092</isbn><isbn>9075815093</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotzD1rwzAQAFBBKaSknjtk0R-we_o4STeG4KSFlHoIdAyyfQaV2g6WKfTfd2intz0hnhRUSgE9101daQCstCJD9k4U5AOBx6AQSG9EkfMnAChy3gT3IMyxOe1lGzP3sufYl2saWXbzeOMpxzXNkxzmRTYfbzJN37ysvORHcT_Er8zFv1txOdaXw0t5fj-9HvbnMhGsZYzojNet9-Co1ayA21YNLngkrW0fyUbXeR0ZCU3QIXRmcOy9wsGiMWYrdn9tYubrbUljXH6uyjnEYM0v4IlBHw</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Rauma, K.</creator><creator>Laakkonen, O.</creator><creator>Ikonen, M.</creator><creator>Silventoinen, P.</creator><creator>Pyrhonen, O.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2005</creationdate><title>FPGA based dead-time compensation for PWM inverters</title><author>Rauma, K. ; Laakkonen, O. ; Ikonen, M. ; Silventoinen, P. ; Pyrhonen, O.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-aa56372b77069b2e10ebb1f68759224da94a6c72ae59538288c3f6e7715f45333</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Application specific integrated circuits</topic><topic>Circuit testing</topic><topic>Converter control</topic><topic>Field programmable gate arrays</topic><topic>Industrial applications</topic><topic>Integrated circuit measurements</topic><topic>Intelligent drive</topic><topic>Logic circuits</topic><topic>Measurement</topic><topic>Modulation coding</topic><topic>Modulation Strategy</topic><topic>Programmable logic arrays</topic><topic>Pulse width modulation inverters</topic><topic>System testing</topic><topic>Voltage</topic><toplevel>online_resources</toplevel><creatorcontrib>Rauma, K.</creatorcontrib><creatorcontrib>Laakkonen, O.</creatorcontrib><creatorcontrib>Ikonen, M.</creatorcontrib><creatorcontrib>Silventoinen, P.</creatorcontrib><creatorcontrib>Pyrhonen, O.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rauma, K.</au><au>Laakkonen, O.</au><au>Ikonen, M.</au><au>Silventoinen, P.</au><au>Pyrhonen, O.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>FPGA based dead-time compensation for PWM inverters</atitle><btitle>2005 European Conference on Power Electronics and Applications</btitle><stitle>EPE</stitle><date>2005</date><risdate>2005</risdate><spage>7 pp.</spage><epage>P.7</epage><pages>7 pp.-P.7</pages><isbn>9789075815092</isbn><isbn>9075815093</isbn><abstract>Dead-times of power switches causes significant errors in some electric drive applications. Compensation of the error can be done with a small amount of discrete components and small programmable logic circuit. Larger field programmable gate array (FPGA) circuit allows integration of the modulator and compensation logic in the same circuit resulting a very compact and cheap solution. This paper presents one solution to implement a dead-time compensation logic with a cheap and exact voltage feedback and a simple logic that can be implemented in a FPGA or application specific integrated circuits (ASIC). Full test system and measurement results are presented</abstract><pub>IEEE</pub><doi>10.1109/EPE.2005.219394</doi></addata></record>
fulltext fulltext_linktorsrc
identifier ISBN: 9789075815092
ispartof 2005 European Conference on Power Electronics and Applications, 2005, p.7 pp.-P.7
issn
language eng
recordid cdi_ieee_primary_1665584
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Application specific integrated circuits
Circuit testing
Converter control
Field programmable gate arrays
Industrial applications
Integrated circuit measurements
Intelligent drive
Logic circuits
Measurement
Modulation coding
Modulation Strategy
Programmable logic arrays
Pulse width modulation inverters
System testing
Voltage
title FPGA based dead-time compensation for PWM inverters
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-20T06%3A56%3A58IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=FPGA%20based%20dead-time%20compensation%20for%20PWM%20inverters&rft.btitle=2005%20European%20Conference%20on%20Power%20Electronics%20and%20Applications&rft.au=Rauma,%20K.&rft.date=2005&rft.spage=7%20pp.&rft.epage=P.7&rft.pages=7%20pp.-P.7&rft.isbn=9789075815092&rft.isbn_list=9075815093&rft_id=info:doi/10.1109/EPE.2005.219394&rft_dat=%3Cieee_6IE%3E1665584%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1665584&rfr_iscdi=true