Selection of instruction set extensions for an FPGA embedded processor core

A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex family of FPGAs. The instruction set of the PowerPC 405 is extended by selecting additional instructions from the full 32-bit PowerPC instructi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Veale, B.F., Antonio, J.K., Tull, M.P., Jones, S.A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Analytical models Application specific processors Computer science Design engineering Design optimization Field programmable gate arrays Hardware Instruction sets Process design Statistics
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