Device interconnection technology for advanced thermal conduction modules

The use of area array solder bumps on silicon devices known as controlled collapse chip connection (C4) balls for terminating logic and memory devices to ceramic substrates has been extended in both interconnection density and total number of chip I/O connections per module. In addition, a novel mat...

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Veröffentlicht in:IEEE transactions on components, hybrids, and manufacturing technology hybrids, and manufacturing technology, 1992-08, Vol.15 (4), p.432-437
Hauptverfasser: Ray, S.K., Beckham, K.F., Master, R.N.
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container_title IEEE transactions on components, hybrids, and manufacturing technology
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creator Ray, S.K.
Beckham, K.F.
Master, R.N.
description The use of area array solder bumps on silicon devices known as controlled collapse chip connection (C4) balls for terminating logic and memory devices to ceramic substrates has been extended in both interconnection density and total number of chip I/O connections per module. In addition, a novel materials set, namely glass-ceramic with copper internal metallization along with thin film redistribution wiring on the top surface, has been introduced for multilayered ceramic substrates. Key elements of advanced glass-ceramic substrate technology relevant to flip-chip joining are reviewed. This is followed by a discussion of device join and replace processes used in advanced thermal conduction modules (ATCMs). These models have decoupling capacitors which are attached by C4 solder reflow. Optimization of the top surface metallurgy and device join parameters necessary to achieve reliable joining of more than 70,000 solder balls per module is discussed.< >
doi_str_mv 10.1109/33.159870
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fullrecord <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_ieee_primary_159870</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>159870</ieee_id><sourcerecordid>25615905</sourcerecordid><originalsourceid>FETCH-LOGICAL-c306t-e8957d7a3384c207e7ec3c3a24e41a306cf134664895d14e97311b2d6a196abe3</originalsourceid><addsrcrecordid>eNpF0M9LwzAYxvEgCs7pwaunHkTw0Jk3SdPmKP4cDLzouWTpW1dJk5m0g_33Rjr0lMsnX3gfQi6BLgCouuN8AYWqSnpEZlAUVc5pxY7JjIKocikATslZjF-UMqYknZHlI-46g1nnBgzGO4dm6LzLBjQb563_3GetD5ludtoZbLJhg6HXNku0GSfa-2a0GM_JSattxIvDOycfz0_vD6_56u1l-XC_yg2ncsixUkXZlJrzShhGSyzRcMM1EyhAJ2Ja4EJKkVwDAlXJAdaskRqU1Gvkc3IzdbfBf48Yh7rvokFrtUM_xpoVMi1AiwRvJ2iCjzFgW29D1-uwr4HWv2PVnNfTWMleH6I6Gm3bkK7t4t8HIZRgDBK7mliHiP-5qfED8KlxDg</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>25615905</pqid></control><display><type>article</type><title>Device interconnection technology for advanced thermal conduction modules</title><source>IEEE Electronic Library (IEL)</source><creator>Ray, S.K. ; Beckham, K.F. ; Master, R.N.</creator><creatorcontrib>Ray, S.K. ; Beckham, K.F. ; Master, R.N.</creatorcontrib><description>The use of area array solder bumps on silicon devices known as controlled collapse chip connection (C4) balls for terminating logic and memory devices to ceramic substrates has been extended in both interconnection density and total number of chip I/O connections per module. In addition, a novel materials set, namely glass-ceramic with copper internal metallization along with thin film redistribution wiring on the top surface, has been introduced for multilayered ceramic substrates. Key elements of advanced glass-ceramic substrate technology relevant to flip-chip joining are reviewed. This is followed by a discussion of device join and replace processes used in advanced thermal conduction modules (ATCMs). These models have decoupling capacitors which are attached by C4 solder reflow. Optimization of the top surface metallurgy and device join parameters necessary to achieve reliable joining of more than 70,000 solder balls per module is discussed.&lt; &gt;</description><identifier>ISSN: 0148-6411</identifier><identifier>EISSN: 1558-3082</identifier><identifier>DOI: 10.1109/33.159870</identifier><identifier>CODEN: ITTEDR</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Ceramics ; Conducting materials ; Copper ; Design. Technologies. Operation analysis. Testing ; Electronics ; Exact sciences and technology ; Inorganic materials ; Integrated circuits ; Logic arrays ; Logic devices ; Metallization ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Silicon devices ; Substrates ; Thermal conductivity</subject><ispartof>IEEE transactions on components, hybrids, and manufacturing technology, 1992-08, Vol.15 (4), p.432-437</ispartof><rights>1993 INIST-CNRS</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c306t-e8957d7a3384c207e7ec3c3a24e41a306cf134664895d14e97311b2d6a196abe3</citedby><cites>FETCH-LOGICAL-c306t-e8957d7a3384c207e7ec3c3a24e41a306cf134664895d14e97311b2d6a196abe3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/159870$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,780,784,789,790,796,23930,23931,25140,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/159870$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&amp;idt=4494221$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Ray, S.K.</creatorcontrib><creatorcontrib>Beckham, K.F.</creatorcontrib><creatorcontrib>Master, R.N.</creatorcontrib><title>Device interconnection technology for advanced thermal conduction modules</title><title>IEEE transactions on components, hybrids, and manufacturing technology</title><addtitle>T-CHMT</addtitle><description>The use of area array solder bumps on silicon devices known as controlled collapse chip connection (C4) balls for terminating logic and memory devices to ceramic substrates has been extended in both interconnection density and total number of chip I/O connections per module. In addition, a novel materials set, namely glass-ceramic with copper internal metallization along with thin film redistribution wiring on the top surface, has been introduced for multilayered ceramic substrates. Key elements of advanced glass-ceramic substrate technology relevant to flip-chip joining are reviewed. This is followed by a discussion of device join and replace processes used in advanced thermal conduction modules (ATCMs). These models have decoupling capacitors which are attached by C4 solder reflow. Optimization of the top surface metallurgy and device join parameters necessary to achieve reliable joining of more than 70,000 solder balls per module is discussed.&lt; &gt;</description><subject>Applied sciences</subject><subject>Ceramics</subject><subject>Conducting materials</subject><subject>Copper</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Inorganic materials</subject><subject>Integrated circuits</subject><subject>Logic arrays</subject><subject>Logic devices</subject><subject>Metallization</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicon devices</subject><subject>Substrates</subject><subject>Thermal conductivity</subject><issn>0148-6411</issn><issn>1558-3082</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1992</creationdate><recordtype>article</recordtype><recordid>eNpF0M9LwzAYxvEgCs7pwaunHkTw0Jk3SdPmKP4cDLzouWTpW1dJk5m0g_33Rjr0lMsnX3gfQi6BLgCouuN8AYWqSnpEZlAUVc5pxY7JjIKocikATslZjF-UMqYknZHlI-46g1nnBgzGO4dm6LzLBjQb563_3GetD5ludtoZbLJhg6HXNku0GSfa-2a0GM_JSattxIvDOycfz0_vD6_56u1l-XC_yg2ncsixUkXZlJrzShhGSyzRcMM1EyhAJ2Ja4EJKkVwDAlXJAdaskRqU1Gvkc3IzdbfBf48Yh7rvokFrtUM_xpoVMi1AiwRvJ2iCjzFgW29D1-uwr4HWv2PVnNfTWMleH6I6Gm3bkK7t4t8HIZRgDBK7mliHiP-5qfED8KlxDg</recordid><startdate>19920801</startdate><enddate>19920801</enddate><creator>Ray, S.K.</creator><creator>Beckham, K.F.</creator><creator>Master, R.N.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>19920801</creationdate><title>Device interconnection technology for advanced thermal conduction modules</title><author>Ray, S.K. ; Beckham, K.F. ; Master, R.N.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c306t-e8957d7a3384c207e7ec3c3a24e41a306cf134664895d14e97311b2d6a196abe3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Applied sciences</topic><topic>Ceramics</topic><topic>Conducting materials</topic><topic>Copper</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Inorganic materials</topic><topic>Integrated circuits</topic><topic>Logic arrays</topic><topic>Logic devices</topic><topic>Metallization</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Silicon devices</topic><topic>Substrates</topic><topic>Thermal conductivity</topic><toplevel>online_resources</toplevel><creatorcontrib>Ray, S.K.</creatorcontrib><creatorcontrib>Beckham, K.F.</creatorcontrib><creatorcontrib>Master, R.N.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts – Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEEE transactions on components, hybrids, and manufacturing technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ray, S.K.</au><au>Beckham, K.F.</au><au>Master, R.N.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Device interconnection technology for advanced thermal conduction modules</atitle><jtitle>IEEE transactions on components, hybrids, and manufacturing technology</jtitle><stitle>T-CHMT</stitle><date>1992-08-01</date><risdate>1992</risdate><volume>15</volume><issue>4</issue><spage>432</spage><epage>437</epage><pages>432-437</pages><issn>0148-6411</issn><eissn>1558-3082</eissn><coden>ITTEDR</coden><abstract>The use of area array solder bumps on silicon devices known as controlled collapse chip connection (C4) balls for terminating logic and memory devices to ceramic substrates has been extended in both interconnection density and total number of chip I/O connections per module. In addition, a novel materials set, namely glass-ceramic with copper internal metallization along with thin film redistribution wiring on the top surface, has been introduced for multilayered ceramic substrates. Key elements of advanced glass-ceramic substrate technology relevant to flip-chip joining are reviewed. This is followed by a discussion of device join and replace processes used in advanced thermal conduction modules (ATCMs). These models have decoupling capacitors which are attached by C4 solder reflow. Optimization of the top surface metallurgy and device join parameters necessary to achieve reliable joining of more than 70,000 solder balls per module is discussed.&lt; &gt;</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/33.159870</doi><tpages>6</tpages></addata></record>
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1558-3082
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subjects Applied sciences
Ceramics
Conducting materials
Copper
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Inorganic materials
Integrated circuits
Logic arrays
Logic devices
Metallization
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon devices
Substrates
Thermal conductivity
title Device interconnection technology for advanced thermal conduction modules
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-19T12%3A07%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Device%20interconnection%20technology%20for%20advanced%20thermal%20conduction%20modules&rft.jtitle=IEEE%20transactions%20on%20components,%20hybrids,%20and%20manufacturing%20technology&rft.au=Ray,%20S.K.&rft.date=1992-08-01&rft.volume=15&rft.issue=4&rft.spage=432&rft.epage=437&rft.pages=432-437&rft.issn=0148-6411&rft.eissn=1558-3082&rft.coden=ITTEDR&rft_id=info:doi/10.1109/33.159870&rft_dat=%3Cproquest_RIE%3E25615905%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=25615905&rft_id=info:pmid/&rft_ieee_id=159870&rfr_iscdi=true