Memory considerations for high performance SIMD systems with on-chip control

Although arrays of SIMD PEs can be built with very high operating frequencies, problems exist in keeping the array busy. The inherent mismatch between host and array makes it difficult to maintain high array utilization: either the rate of instruction issue is very low or PE data locality is comprom...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Herbordt, M.C., Cravy, J., Lin, C.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Clocks CMOS image sensors Control systems Engines Frequency Graphics Random access memory Sensor arrays System-on-a-chip Tiles
Online-Zugang:	Volltext bestellen
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