A 0.5-V sigma-delta modulator using analog T-switch scheme for the subthreshold leakage suppression
A 0.5-V sigma-delta modulator implemented in a 0.15-mum FD-SOI process with low V TH of 0.1V using analog T-switch (AT-switch) scheme to suppress subthreshold-leakage problems is presented. The scheme is compared with the conventional circuit, which are also fabricated in the same chip. The measurem...
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creator | Ishida, K. Tamtrakarn, A. Sakurai, T. |
description | A 0.5-V sigma-delta modulator implemented in a 0.15-mum FD-SOI process with low V TH of 0.1V using analog T-switch (AT-switch) scheme to suppress subthreshold-leakage problems is presented. The scheme is compared with the conventional circuit, which are also fabricated in the same chip. The measurement result demonstrates that the sigma-delta modulator based on AT-switch realizes 6-bit resolution through reducing nonlinear leakage effects while the conventional circuit can achieve 4-bit resolution |
doi_str_mv | 10.1109/ASPDAC.2006.1594655 |
format | Conference Proceeding |
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The scheme is compared with the conventional circuit, which are also fabricated in the same chip. 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The scheme is compared with the conventional circuit, which are also fabricated in the same chip. The measurement result demonstrates that the sigma-delta modulator based on AT-switch realizes 6-bit resolution through reducing nonlinear leakage effects while the conventional circuit can achieve 4-bit resolution</description><subject>Analog circuits</subject><subject>Circuit synthesis</subject><subject>Delta-sigma modulation</subject><subject>Digital circuits</subject><subject>Logic</subject><subject>Semiconductor device measurement</subject><subject>Subthreshold current</subject><subject>Threshold voltage</subject><subject>Variable structure systems</subject><subject>Very large scale integration</subject><issn>2153-6961</issn><issn>2153-697X</issn><isbn>9780780394513</isbn><isbn>0780394518</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNo9kM1qwzAQhEV_oCHNE-SiF5C7krJydDTpTwqBFpqW3sJalm21dhwsh9K3r0tDh4GBb5Y9DGNzCYmUYG-yl-fbbJUoAJNItAuDeMYmSqIWxqbv52xm0yWM1naBUl_8d0ZesVmMHzAKQaUSJsxlHBIUbzyGqiVR-GYg3nbFsaGh6_kxhn3FaU9NV_GtiF9hcDWPrvat5-V4MNSex2M-1L2PddcUvPH0SdUvPBxGFkO3v2aXJTXRz045Za_3d9vVWmyeHh5X2UYECTgIadNCErjcgSdXkCWZGjQ4ErC5yo2mPNelRbdMnfIWl8pBSRIXulRIXk_Z_O9v8N7vDn1oqf_enSbSP-sjWaI</recordid><startdate>2006</startdate><enddate>2006</enddate><creator>Ishida, K.</creator><creator>Tamtrakarn, A.</creator><creator>Sakurai, T.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2006</creationdate><title>A 0.5-V sigma-delta modulator using analog T-switch scheme for the subthreshold leakage suppression</title><author>Ishida, K. ; Tamtrakarn, A. ; Sakurai, T.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i105t-197d1a0cbc0eacda9a1765650cb09b2b63abb3f95c87c2e9582c0fa1543f25ae3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Analog circuits</topic><topic>Circuit synthesis</topic><topic>Delta-sigma modulation</topic><topic>Digital circuits</topic><topic>Logic</topic><topic>Semiconductor device measurement</topic><topic>Subthreshold current</topic><topic>Threshold voltage</topic><topic>Variable structure systems</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Ishida, K.</creatorcontrib><creatorcontrib>Tamtrakarn, A.</creatorcontrib><creatorcontrib>Sakurai, T.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ishida, K.</au><au>Tamtrakarn, A.</au><au>Sakurai, T.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 0.5-V sigma-delta modulator using analog T-switch scheme for the subthreshold leakage suppression</atitle><btitle>Asia and South Pacific Conference on Design Automation, 2006</btitle><stitle>ASPDAC</stitle><date>2006</date><risdate>2006</risdate><spage>2 pp.</spage><pages>2 pp.-</pages><issn>2153-6961</issn><eissn>2153-697X</eissn><isbn>9780780394513</isbn><isbn>0780394518</isbn><abstract>A 0.5-V sigma-delta modulator implemented in a 0.15-mum FD-SOI process with low V TH of 0.1V using analog T-switch (AT-switch) scheme to suppress subthreshold-leakage problems is presented. The scheme is compared with the conventional circuit, which are also fabricated in the same chip. The measurement result demonstrates that the sigma-delta modulator based on AT-switch realizes 6-bit resolution through reducing nonlinear leakage effects while the conventional circuit can achieve 4-bit resolution</abstract><pub>IEEE</pub><doi>10.1109/ASPDAC.2006.1594655</doi></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | Analog circuits Circuit synthesis Delta-sigma modulation Digital circuits Logic Semiconductor device measurement Subthreshold current Threshold voltage Variable structure systems Very large scale integration |
title | A 0.5-V sigma-delta modulator using analog T-switch scheme for the subthreshold leakage suppression |
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