Implementation of a high speed four transmitter space-time encoder using field programmable gate array and parallel digital signal processors
This paper describes the concept, architecture, development and demonstration of a high performance, 4 transmitter, real-time space time encoder designed for research into transmitter diversity and multiple input and multiple output (MIMO) wireless systems. It is implemented on a Xilinx Virtex 2 Pro...
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| creator | Green, P.J. Taylor, D.P. |
| description | This paper describes the concept, architecture, development and demonstration of a high performance, 4 transmitter, real-time space time encoder designed for research into transmitter diversity and multiple input and multiple output (MIMO) wireless systems. It is implemented on a Xilinx Virtex 2 Pro field programmable gate array (FPGA) and parallel processing on multiple Freescale DSP56321 digital signal processors (DSP). The system is software defined to allow for flexibility in the choice of transmit modulation formats, data rates and space-time coding schemes. Hardware, firmware and software aspects of the space time encoder system to meet design requirements are discussed. The testing and demonstration of the system running the Alamouti space time coding scheme is covered |
| doi_str_mv | 10.1109/DELTA.2006.55 |
| format | Conference Proceeding |
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The testing and demonstration of the system running the Alamouti space time coding scheme is covered</description><subject>Digital signal processing</subject><subject>Digital signal processors</subject><subject>Field programmable gate arrays</subject><subject>Hardware</subject><subject>MIMO</subject><subject>Modulation</subject><subject>Parallel processing</subject><subject>Real time systems</subject><subject>Software systems</subject><subject>Transmitters</subject><isbn>9780769525006</isbn><isbn>0769525008</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjL1qwzAUhQWl0JJm7NTlvoBT_Vi2PIY0bQOBLtnDlX3tqEi2kZQhD9F3rqE9ywff4RzGngXfCMGb17f98bTdSM6rjdZ3bN3UhtdVo6Ve1ANbp_TNl6imLLl6ZD-HMHsKNGbMbhph6gHh4oYLpJmog366RsgRxxRczhQXjS0V2QUCGtupW9Q1uXGA3pHvYI7TEDEEtJ5gwEyAMeINcFw6jOg9eejc4DJ6SG4YFyybllKaYnpi9z36ROt_rtjpfX_afRbHr4_DbnssnBRlLiTaCqXuWqON7a2qes4F1UaQqEpJSrW2bXSprOI1ybY2aIykElVppJWdWrGXv1tHROc5uoDxdhbaCKkb9QviAGSA</recordid><startdate>2006</startdate><enddate>2006</enddate><creator>Green, P.J.</creator><creator>Taylor, D.P.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2006</creationdate><title>Implementation of a high speed four transmitter space-time encoder using field programmable gate array and parallel digital signal processors</title><author>Green, P.J. ; Taylor, D.P.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i214t-2ab6a25dc858bfb36f001e781e1642e33cbc9543b307e2c78a882e4a3482b2d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Digital signal processing</topic><topic>Digital signal processors</topic><topic>Field programmable gate arrays</topic><topic>Hardware</topic><topic>MIMO</topic><topic>Modulation</topic><topic>Parallel processing</topic><topic>Real time systems</topic><topic>Software systems</topic><topic>Transmitters</topic><toplevel>online_resources</toplevel><creatorcontrib>Green, P.J.</creatorcontrib><creatorcontrib>Taylor, D.P.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Green, P.J.</au><au>Taylor, D.P.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Implementation of a high speed four transmitter space-time encoder using field programmable gate array and parallel digital signal processors</atitle><btitle>Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06)</btitle><stitle>DELTA</stitle><date>2006</date><risdate>2006</risdate><spage>6 pp.</spage><epage>471</epage><pages>6 pp.-471</pages><isbn>9780769525006</isbn><isbn>0769525008</isbn><abstract>This paper describes the concept, architecture, development and demonstration of a high performance, 4 transmitter, real-time space time encoder designed for research into transmitter diversity and multiple input and multiple output (MIMO) wireless systems. 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| identifier | ISBN: 9780769525006 |
| ispartof | Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006, p.6 pp.-471 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Digital signal processing Digital signal processors Field programmable gate arrays Hardware MIMO Modulation Parallel processing Real time systems Software systems Transmitters |
| title | Implementation of a high speed four transmitter space-time encoder using field programmable gate array and parallel digital signal processors |
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