Neural network based technique for detecting catastrophic and parametric faults in analog circuits

The approach to transient functional test of analog circuits is considered. The artificial neural network is proposed for realization of the circuit under test (CUT) response analysis. The coefficients of wavelet decomposition of CUT transient output responses reflecting the dynamical behavior of an...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Mosin, S.G.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 229
container_issue
container_start_page 224
container_title
container_volume
creator Mosin, S.G.
description The approach to transient functional test of analog circuits is considered. The artificial neural network is proposed for realization of the circuit under test (CUT) response analysis. The coefficients of wavelet decomposition of CUT transient output responses reflecting the dynamical behavior of analog circuit are used for neural network training sensitivity analysis is applied for selecting the test frequencies and test nodes. The experimental results for analog benchmark circuits are provided.
doi_str_mv 10.1109/ICSENG.2005.58
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1562856</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1562856</ieee_id><sourcerecordid>1562856</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-8d7fc44561b918ea0817a0914e66019010aab4372f6f64b063c31d55741b6a713</originalsourceid><addsrcrecordid>eNotjE1Lw0AURQdEUGu3btzMH0idl_nKLCXUWih1oa7LS_JiR9MkzkwQ_72BejeXw7lcxu5ArACEe9iWr-v9ZpULoVe6uGA3whqnc6mdvmLLGD_FHOmMcuaaVXuaAna8p_QzhC9eYaSGJ6qPvf-eiLdD4A3NnHz_wWtMGFMYxqOvOfYNHzHgiVKYscWpS5H7fhbYDfPYh3ryKd6yyxa7SMv_XrD3p_Vb-ZztXjbb8nGXebA6ZUVj21opbaByUBCKAiwKB4qMEeAECMRKSZu3pjWqEkbWEhqtrYLKoAW5YPfnX09EhzH4E4bfA2iTF9rIP9mtU28</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Neural network based technique for detecting catastrophic and parametric faults in analog circuits</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Mosin, S.G.</creator><creatorcontrib>Mosin, S.G.</creatorcontrib><description>The approach to transient functional test of analog circuits is considered. The artificial neural network is proposed for realization of the circuit under test (CUT) response analysis. The coefficients of wavelet decomposition of CUT transient output responses reflecting the dynamical behavior of analog circuit are used for neural network training sensitivity analysis is applied for selecting the test frequencies and test nodes. The experimental results for analog benchmark circuits are provided.</description><identifier>ISBN: 0769523595</identifier><identifier>ISBN: 9780769523590</identifier><identifier>DOI: 10.1109/ICSENG.2005.58</identifier><language>eng</language><publisher>IEEE</publisher><subject>Analog circuits ; Artificial neural networks ; Circuit faults ; Circuit testing ; Electrical fault detection ; Fault detection ; Neural networks ; Sensitivity analysis ; Transient analysis ; Wavelet analysis</subject><ispartof>18th International Conference on Systems Engineering (ICSEng'05), 2005, p.224-229</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1562856$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>310,311,782,786,791,792,2062,4054,4055,27934,54929</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1562856$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Mosin, S.G.</creatorcontrib><title>Neural network based technique for detecting catastrophic and parametric faults in analog circuits</title><title>18th International Conference on Systems Engineering (ICSEng'05)</title><addtitle>ICSENG</addtitle><description>The approach to transient functional test of analog circuits is considered. The artificial neural network is proposed for realization of the circuit under test (CUT) response analysis. The coefficients of wavelet decomposition of CUT transient output responses reflecting the dynamical behavior of analog circuit are used for neural network training sensitivity analysis is applied for selecting the test frequencies and test nodes. The experimental results for analog benchmark circuits are provided.</description><subject>Analog circuits</subject><subject>Artificial neural networks</subject><subject>Circuit faults</subject><subject>Circuit testing</subject><subject>Electrical fault detection</subject><subject>Fault detection</subject><subject>Neural networks</subject><subject>Sensitivity analysis</subject><subject>Transient analysis</subject><subject>Wavelet analysis</subject><isbn>0769523595</isbn><isbn>9780769523590</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjE1Lw0AURQdEUGu3btzMH0idl_nKLCXUWih1oa7LS_JiR9MkzkwQ_72BejeXw7lcxu5ArACEe9iWr-v9ZpULoVe6uGA3whqnc6mdvmLLGD_FHOmMcuaaVXuaAna8p_QzhC9eYaSGJ6qPvf-eiLdD4A3NnHz_wWtMGFMYxqOvOfYNHzHgiVKYscWpS5H7fhbYDfPYh3ryKd6yyxa7SMv_XrD3p_Vb-ZztXjbb8nGXebA6ZUVj21opbaByUBCKAiwKB4qMEeAECMRKSZu3pjWqEkbWEhqtrYLKoAW5YPfnX09EhzH4E4bfA2iTF9rIP9mtU28</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Mosin, S.G.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2005</creationdate><title>Neural network based technique for detecting catastrophic and parametric faults in analog circuits</title><author>Mosin, S.G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-8d7fc44561b918ea0817a0914e66019010aab4372f6f64b063c31d55741b6a713</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Analog circuits</topic><topic>Artificial neural networks</topic><topic>Circuit faults</topic><topic>Circuit testing</topic><topic>Electrical fault detection</topic><topic>Fault detection</topic><topic>Neural networks</topic><topic>Sensitivity analysis</topic><topic>Transient analysis</topic><topic>Wavelet analysis</topic><toplevel>online_resources</toplevel><creatorcontrib>Mosin, S.G.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mosin, S.G.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Neural network based technique for detecting catastrophic and parametric faults in analog circuits</atitle><btitle>18th International Conference on Systems Engineering (ICSEng'05)</btitle><stitle>ICSENG</stitle><date>2005</date><risdate>2005</risdate><spage>224</spage><epage>229</epage><pages>224-229</pages><isbn>0769523595</isbn><isbn>9780769523590</isbn><abstract>The approach to transient functional test of analog circuits is considered. The artificial neural network is proposed for realization of the circuit under test (CUT) response analysis. The coefficients of wavelet decomposition of CUT transient output responses reflecting the dynamical behavior of analog circuit are used for neural network training sensitivity analysis is applied for selecting the test frequencies and test nodes. The experimental results for analog benchmark circuits are provided.</abstract><pub>IEEE</pub><doi>10.1109/ICSENG.2005.58</doi><tpages>6</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISBN: 0769523595
ispartof 18th International Conference on Systems Engineering (ICSEng'05), 2005, p.224-229
issn
language eng
recordid cdi_ieee_primary_1562856
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Analog circuits
Artificial neural networks
Circuit faults
Circuit testing
Electrical fault detection
Fault detection
Neural networks
Sensitivity analysis
Transient analysis
Wavelet analysis
title Neural network based technique for detecting catastrophic and parametric faults in analog circuits
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-11-30T08%3A45%3A13IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Neural%20network%20based%20technique%20for%20detecting%20catastrophic%20and%20parametric%20faults%20in%20analog%20circuits&rft.btitle=18th%20International%20Conference%20on%20Systems%20Engineering%20(ICSEng'05)&rft.au=Mosin,%20S.G.&rft.date=2005&rft.spage=224&rft.epage=229&rft.pages=224-229&rft.isbn=0769523595&rft.isbn_list=9780769523590&rft_id=info:doi/10.1109/ICSENG.2005.58&rft_dat=%3Cieee_6IE%3E1562856%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1562856&rfr_iscdi=true