A low-power 5 GHz CMOS LC-VCO optimized for high-resistivity SOI substrates

This paper discusses the power saving of an LC-VCO designed on high-resistivity SOI substrates (/spl rho/ > 1000/spl Omega//spl middot/cm). It demonstrates the drastic improvement in the varactors and inductors quality factor on these substrates. It stresses on the importance of optimizing the ta...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Delatte, P., Picun, G., Demeus, L., Simon, P., Flandre, D.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuits CMOS process Design optimization Inductors Phase noise Q factor Radio frequency Tuning Varactors Voltage-controlled oscillators
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